EP20K30EFC324-1X vs EP20K100EFC324-1N Vergleich
Detaillierter Direktvergleich von EP20K30EFC324-1X von Intel und EP20K100EFC324-1N von Altera. Vergleichen Sie die wichtigsten Spezifikationen, elektrischen Parameter, Gehäuse, Lebenszyklusstatus, Preise und Verfügbarkeit, um das beste Bauteil für Ihre Designanforderungen zu ermitteln.
Intel
EP20K30EFC324-1X - APEX 20KE FPGA, 30K Gates, 324-BGA | Intel / Altera
EP20K30EFC324-1X ObsoleteSpezifikationsvergleich
| Parameter | EP20K30EFC324-1X | EP20K100EFC324-1N |
|---|---|---|
| Marke | Intel | Altera |
| Kategorie | FPGA & CPLD | FPGA & CPLD |
| Lebenszyklusstatus | Obsolete | Obsolete |
| Lagerstatus | In Stock | In Stock |
| Stückpreis (USD) | $3,30 | $108,00 |
| Series | APEX 20KE | — |
| Family | APEX-20K® (MultiCore™ architecture) | APEX-20KE |
| Typical Gate Count | 30,000 gates | — |
| Logic Elements (LEs) | 1,200 | 4160 |
| Embedded Memory (RAM bits) | 24,576 | — |
| Maximum User I/O | 128 | 246 |
| Dedicated Inputs | 4 | — |
| Core Supply Voltage | 1.71 V to 1.89 V (1.8 V nominal) | — |
| I/O Standard Support | LVDS, LVTTL, LVCMOS, PCI, SSTL | LVDS, SSTL, HSTL, LVTTL, LVCMOS |
| Logic Delay (tPD) | 1.91 ns | — |
| Maximale Taktfrequenz | 909 MHz (internal), 160 MHz (I/O per partstack summary) | — |
| Process Technology | 0.22 µm CMOS | 0.15 µm all-layer copper CMOS |
| Gehäuse | 324-ball FBGA (FineLine BGA), 19x19 mm | 324-BGA (FineLine BGA) |
| Montageart | Surface Mount | — |
| Configuration Method | Passive Serial, JTAG, Fast Passive Parallel | — |
| PLLs | 4 | — |
| RoHS-Status | Compliant | — |
| Operating Temperature Grade | Commercial (0 °C to +85 °C) per package suffix interpretation; industrial on -1X grade [DATA_NEEDED: exact Tj range] | — |
| Device Type | — | FPGA (Field Programmable Gate Array) |
| Typical Gates | — | 100,000 |
| Embedded System Blocks (ESBs) | — | 53248 bits |
| Betriebstemperatur | — | 0 C to 85 C |
| Propagation Delay | — | 1.6 ns |
| Internal Operating Frequency | — | 250 MHz |
| Core Voltage | — | 1.8 V |
| JTAG Support | — | IEEE 1149.1 boundary-scan |
| Programming Technology | — | SRAM-based (volatile, requires configuration device) |
| MultiVolt I/O | — | 1.8 V core with 3.3 V / 5.0 V I/O support |