EP20K400BC652-2AA vs EP20K400BC652-1V Vergleich
Detaillierter Direktvergleich von EP20K400BC652-2AA von Intel und EP20K400BC652-1V von Altera. Vergleichen Sie die wichtigsten Spezifikationen, elektrischen Parameter, Gehäuse, Lebenszyklusstatus, Preise und Verfügbarkeit, um das beste Bauteil für Ihre Designanforderungen zu ermitteln.
Spezifikationsvergleich
| Parameter | EP20K400BC652-2AA | EP20K400BC652-1V |
|---|---|---|
| Marke | Intel | Altera |
| Kategorie | FPGA & CPLD | FPGA & CPLD |
| Lebenszyklusstatus | Obsolete | Obsolete |
| Lagerstatus | In Stock | In Stock |
| Stückpreis (USD) | $0,00 | $47,95 |
| Product Type | Field-programmable gate array (FPGA) | — |
| Series | APEX-20K | APEX-20KC |
| Number of LABs/CLBs | 1664 | — |
| Number of Logic Elements/Cells | 16640 | — |
| Total RAM Bits | 212992 bit | — |
| Number of I/O | 502 | — |
| Number of Gates | 1052000 | — |
| Versorgungsspannung | 2.375 V to 2.625 V | — |
| Montageart | Surface Mount | Surface Mount |
| Betriebstemperatur | 0 °C to 85 °C (TJ) | 0C to +85C (commercial) |
| Gehäuse | 652-BGA | 652-BGA (FineLine, 45 x 45 mm) |
| Supplier Device Package | 652-BGA (45x45) [DATA_NEEDED: target-device package dimensions] | — |
| Part Status | Obsolete | — |
| Configuration Memory Technology | [DATA_NEEDED: configuration memory technology] | — |
| Maximum User I/O Frequency | [DATA_NEEDED: maximum user I/O frequency] | — |
| Core Logic Voltage | [DATA_NEEDED: core logic voltage] | — |
| Typical Supply Current | [DATA_NEEDED: typical supply current] | — |
| RoHS-Status | unknown | [DATA_NEEDED: RoHS compliance] |
| REACH Status | unknown | — |
| AEC-Q100 Qualification | unknown | — |
| Family | — | APEX 20K |
| Device Sub-Family | — | EP20K400 |
| System Gates | — | 1,052,000 |
| Maximum Logic Elements | — | 212,992 |
| Macrocells / LABs | — | 16640 |
| Embedded Memory (bits) | — | 212,992 |
| Maximum User I/O | — | 502 |
| Speed Grade | — | -1 |
| Clock-to-Output (Tco) | — | 2.5 ns |
| Core Voltage (VCCINT) | — | 1.8 V |
| I/O Voltage (VCCIO) | — | 2.5 V |
| Configuration | — | SRAM-based, JTAG IEEE 1149.1 |
| Architecture | — | MultiCore (LUT + product-term + ESB) |