EP20K400CB652C7ES vs EP20K400CB652C9N Vergleich
Detaillierter Direktvergleich von EP20K400CB652C7ES von Altera und EP20K400CB652C9N von Intel. Vergleichen Sie die wichtigsten Spezifikationen, elektrischen Parameter, Gehäuse, Lebenszyklusstatus, Preise und Verfügbarkeit, um das beste Bauteil für Ihre Designanforderungen zu ermitteln.
Spezifikationsvergleich
| Parameter | EP20K400CB652C7ES | EP20K400CB652C9N |
|---|---|---|
| Marke | Altera | Intel |
| Kategorie | FPGA & CPLD | FPGA & CPLD |
| Lebenszyklusstatus | Obsolete | NRND |
| Lagerstatus | In Stock | In Stock |
| Stückpreis (USD) | $215,00 | $195,00 |
| Series | APEX 20KC | EP20K400 |
| Family | FPGA APEX 20KC | APEX 20KC |
| System Gates | 400,000 | 400,000 |
| Logic Cells | 16,640 | — |
| Number of Inputs | 488 | — |
| Number of I/O Lines | 484 | — |
| Anzahl der Ausgänge | 484 | — |
| Propagation Delay | 1.4 ns | 2.0 ns |
| Maximale Taktfrequenz | 1666.6 MHz | — |
| Internal Performance | 375.94 MHz | — |
| Process Technology | 0.15 µm | — |
| Core Supply Voltage | 1.8 V | — |
| Package Type | BGA (S-PBGA-B652) | — |
| Number of Terminals | 652 | — |
| Package Body Material | Plastic / Epoxy | — |
| Surface Mount | Yes | — |
| Speed Grade | C7 | — |
| Betriebstemperatur | [DATA_NEEDED: Operating temperature] | — |
| RoHS-Status | [DATA_NEEDED: RoHS] | Unknown (legacy Altera part - verify with distributor) |
| Device Type | — | Programmable Logic Device (SOPC FPGA) |
| Architecture | — | MultiCore (LUT logic + Embedded System Blocks) |
| Logic Elements | — | 16,640 |
| Maximum User I/Os | — | 502 |
| Total Memory Bits | — | 212,992 (per chip) |
| Maximum Internal Frequency | — | 250 MHz |
| Logic Family | — | CMOS |
| Core Process Technology | — | 0.15 µm all-layer copper CMOS |
| Core Supply Voltage (VCCINT) | — | 1.8 V |
| I/O Supply Voltage (VCCIO) | — | 2.5 V |
| Betriebstemperaturbereich | — | 0 °C to +85 °C (Commercial) |
| Gehäuse | — | BGA-652 (Plastic Ball Grid Array, 652 balls) |
| Montageart | — | Surface Mount |
| Configuration Interface | — | IEEE 1149.1 JTAG, serial passive parallel async |