EP20K400EBC652-1X vs EP20K600CB652C7ES Vergleich
Detaillierter Direktvergleich von EP20K400EBC652-1X von Intel und EP20K600CB652C7ES von Altera. Vergleichen Sie die wichtigsten Spezifikationen, elektrischen Parameter, Gehäuse, Lebenszyklusstatus, Preise und Verfügbarkeit, um das beste Bauteil für Ihre Designanforderungen zu ermitteln.
Spezifikationsvergleich
| Parameter | EP20K400EBC652-1X | EP20K600CB652C7ES |
|---|---|---|
| Marke | Intel | Altera |
| Kategorie | FPGA & CPLD | FPGA & CPLD |
| Lebenszyklusstatus | Obsolete | Obsolete |
| Lagerstatus | In Stock | In Stock |
| Stückpreis (USD) | $92,00 | $195,00 |
| Family | APEX 20KE | APEX 20KC |
| Series | APEX-20KE® | — |
| Logic Elements / Cells | 16640 | — |
| System Gates | 1052000 (typical marketing) | 600,000 |
| Embedded Memory (bits) | 212992 | — |
| Number of Macrocells | 1664 | — |
| Number of User I/Os | 488 | — |
| Supply Voltage - Core | 1.8 V (1.71 V to 1.89 V) | 1.71 V to 1.89 V (1.8 V nominal) |
| Supply Voltage - I/O | 2.5 V (multi-voltage I/O supported) | — |
| Process Technology | 0.22 µm CMOS | 0.15 µm CMOS |
| Gehäuse / Bauform | 652-BGA (45 x 45 mm) | — |
| Supplier Device Package | 652-BGA | — |
| Betriebstemperatur | 0 °C to +85 °C (Commercial) | 0 °C to +85 °C (commercial) |
| Speed Grade | -1X (faster bin) | — |
| Montageart | Surface Mount | Surface Mount (BGA) |
| Propagation Delay (per macrocell) | [DATA_NEEDED: per-datasheet ns] | — |
| RoHS-Status | [DATA_NEEDED: not confirmed for this specific lot] | [DATA_NEEDED: RoHS status] |
| Lead-Free | Yes (per modern distribution) | — |
| Logic Elements | — | 24,320 |
| Maximum System Gates | — | 1,053,840 |
| Embedded Memory Bits | — | 311,296 |
| Embedded System Blocks (ESB) | — | 26 |
| Maximum User I/O | — | 488 |
| User I/O (this package) | — | 488 (652-BGA) |
| Maximum Internal Clock Frequency | — | 1666.6 MHz |
| Propagation Delay | — | 1.6 ns |
| Package Type | — | 652-ball FineLine BGA |
| JEDEC Package Code | — | S-PBGA-B652 |
| Configuration Modes | — | Passive Serial, Passive Parallel, JTAG |
| JTAG Boundary Scan | — | IEEE 1149.1 compliant |
| PLLs | — | 4 |