EP20K400GC652-1XV vs EP20K400BC652-1V Vergleich
Detaillierter Direktvergleich von EP20K400GC652-1XV von Altera und EP20K400BC652-1V von Altera. Vergleichen Sie die wichtigsten Spezifikationen, elektrischen Parameter, Gehäuse, Lebenszyklusstatus, Preise und Verfügbarkeit, um das beste Bauteil für Ihre Designanforderungen zu ermitteln.
Spezifikationsvergleich
| Parameter | EP20K400GC652-1XV | EP20K400BC652-1V |
|---|---|---|
| Marke | Altera | Altera |
| Kategorie | FPGA & CPLD | FPGA & CPLD |
| Lebenszyklusstatus | Obsolete | Obsolete |
| Lagerstatus | In Stock | In Stock |
| Stückpreis (USD) | $190,00 | $47,95 |
| Family | APEX 20K | APEX 20K |
| Logic Elements (Macros) | 1664 | — |
| Typical System Gates | 400,000 | — |
| Maximum User I/O | 502 | 502 |
| Embedded SRAM | 212,992 bits | — |
| Core Supply Voltage | 2.5 V | — |
| Propagation Delay | 2.5 ns | — |
| Logic Family | CMOS | — |
| Package Type | BGA-652 (thermally enhanced) | — |
| Betriebstemperatur | 0 C to +85 C | 0C to +85C (commercial) |
| Speed Grade | -1 (standard) | -1 |
| Montageart | Surface Mount | Surface Mount |
| RoHS-Status | Compliant (lead-free, V suffix) | [DATA_NEEDED: RoHS compliance] |
| Architecture | MultiCore (LUT + EAB + FastTrack interconnect) | MultiCore (LUT + product-term + ESB) |
| Programming Interface | JTAG (IEEE 1149.1) / passive serial | — |
| Series | — | APEX-20KC |
| Device Sub-Family | — | EP20K400 |
| System Gates | — | 1,052,000 |
| Maximum Logic Elements | — | 212,992 |
| Macrocells / LABs | — | 16640 |
| Embedded Memory (bits) | — | 212,992 |
| Clock-to-Output (Tco) | — | 2.5 ns |
| Core Voltage (VCCINT) | — | 1.8 V |
| I/O Voltage (VCCIO) | — | 2.5 V |
| Gehäuse | — | 652-BGA (FineLine, 45 x 45 mm) |
| Configuration | — | SRAM-based, JTAG IEEE 1149.1 |