EP20K400GC652-1XV vs EP20K400GC655-2 Vergleich
Detaillierter Direktvergleich von EP20K400GC652-1XV von Altera und EP20K400GC655-2 von Altera. Vergleichen Sie die wichtigsten Spezifikationen, elektrischen Parameter, Gehäuse, Lebenszyklusstatus, Preise und Verfügbarkeit, um das beste Bauteil für Ihre Designanforderungen zu ermitteln.
Spezifikationsvergleich
| Parameter | EP20K400GC652-1XV | EP20K400GC655-2 |
|---|---|---|
| Marke | Altera | Altera |
| Kategorie | FPGA & CPLD | FPGA & CPLD |
| Lebenszyklusstatus | Obsolete | Obsolete |
| Lagerstatus | In Stock | In Stock |
| Stückpreis (USD) | $190,00 | $80,00 |
| Family | APEX 20K | APEX 20K |
| Logic Elements (Macros) | 1664 | — |
| Typical System Gates | 400,000 | — |
| Maximum User I/O | 502 | — |
| Embedded SRAM | 212,992 bits | — |
| Core Supply Voltage | 2.5 V | 2.5 V |
| Propagation Delay | 2.5 ns | — |
| Logic Family | CMOS | — |
| Package Type | BGA-652 (thermally enhanced) | 655-BCPGA (CPGA-655) |
| Betriebstemperatur | 0 C to +85 C | [DATA_NEEDED: operating temperature range] |
| Speed Grade | -1 (standard) | -2 |
| Montageart | Surface Mount | Through-Hole (CPGA) |
| RoHS-Status | Compliant (lead-free, V suffix) | [DATA_NEEDED: RoHS compliance status] |
| Architecture | MultiCore (LUT + EAB + FastTrack interconnect) | — |
| Programming Interface | JTAG (IEEE 1149.1) / passive serial | — |
| Series | — | APEX-20KC |
| Device Type | — | FPGA (Field Programmable Gate Array) |
| System Gates | — | 400,000 |
| Logic Cells / Elements | — | 16,640 |
| Total RAM Bits | — | 212,992 |
| Maximum Internal Frequency | — | 200 MHz |
| Process Technology | — | 0.22 µm CMOS |
| I/O Supply Voltage | — | 1.71 V to 1.89 V (MultiVolt) |
| LVDS Support | — | Yes |
| PLLs | — | 4 |
| Pin-Anzahl | — | 655 |
| Package Dimensions | — | 62.48 x 62.48 mm |