EP20K400GC655-1X vs EP20K400GC655-3 Vergleich

Detaillierter Direktvergleich von EP20K400GC655-1X von Altera und EP20K400GC655-3 von Intel. Vergleichen Sie die wichtigsten Spezifikationen, elektrischen Parameter, Gehäuse, Lebenszyklusstatus, Preise und Verfügbarkeit, um das beste Bauteil für Ihre Designanforderungen zu ermitteln.

Altera
EP20K400GC655-1X EP20K400GC655-1X - 400K-Gate APEX 20K FPGA | Altera

EP20K400GC655-1X - 400K-Gate APEX 20K FPGA | Altera

EP20K400GC655-1X Obsolete
Intel
EP20K400GC655-3 EP20K400GC655-3 - 400K Gate APEX-20KC FPGA 655-BCPGA | Intel

EP20K400GC655-3 - 400K Gate APEX-20KC FPGA 655-BCPGA | Intel

EP20K400GC655-3 ⚠ Letzte Bestellmöglichkeit

Spezifikationsvergleich

Parameter EP20K400GC655-1X EP20K400GC655-3
Marke Altera Intel
Kategorie FPGA & CPLD FPGA & CPLD
Lebenszyklusstatus Obsolete Letzte Kaufgelegenheit
Lagerstatus In Stock In Stock
Stückpreis (USD) $193,04 $310,00
Product Family Altera APEX 20K —
Device Type Field Programmable Gate Array (FPGA) —
Technology CMOS —
Gate Count 400K gates —
Logic Elements 16640 cells 16640
Maximum System Frequency 250 MHz —
Propagation Delay 2.5 ns —
Core Supply Voltage 2.5 V —
I/O Supply Voltage 2.5 V / 3.3 V —
Number of User I/O 496 —
Number of Dedicated Inputs 6 —
Number of Terminals 655 —
Package Type CPGA-655 (Ceramic Pin Grid Array) —
Package Body Material Ceramic —
Process Technology 0.22 um 0.22 um CMOS
Betriebstemperaturbereich [DATA_NEEDED: operating temperature range] —
Embedded RAM Bits [DATA_NEEDED: embedded RAM bits] —
RoHS-Status unknown [DATA_NEEDED: rohs status]
Series — APEX-20KC
Family — APEX 20K
Manufacturer — Intel (formerly Altera)
Total RAM Bits — 212992
Number of Gates — 400000
Supply Voltage - Core — 1.71 V to 1.89 V (1.8 V nominal)
I/O Voltage Tolerance — MultiVolt I/O: 1.8 V / 2.5 V / 3.3 V / 5 V
Betriebstemperatur — -40C to +85C (industrial)
Maximum Frequency — 167 MHz (per FPGAkey)
Gehäuse / Bauform — 655-BCPGA
Supplier Device Package — 655-CPGA (62.48 x 62.48 mm)
Speed Grade — -3 (slowest grade in family)
Propagation Delay (tPD) — 3.6 ns (per Microchip USA listing)
JTAG Support — IEEE 1149.1 Boundary-Scan
Configuration Modes — Passive Serial, Passive Parallel Sync/Async, Active Serial

Datenblätter & Ressourcen

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