EP20K400GC655-2 vs EP20K400GC652-1XV Vergleich
Detaillierter Direktvergleich von EP20K400GC655-2 von Altera und EP20K400GC652-1XV von Altera. Vergleichen Sie die wichtigsten Spezifikationen, elektrischen Parameter, Gehäuse, Lebenszyklusstatus, Preise und Verfügbarkeit, um das beste Bauteil für Ihre Designanforderungen zu ermitteln.
Spezifikationsvergleich
| Parameter | EP20K400GC655-2 | EP20K400GC652-1XV |
|---|---|---|
| Marke | Altera | Altera |
| Kategorie | FPGA & CPLD | FPGA & CPLD |
| Lebenszyklusstatus | Obsolete | Obsolete |
| Lagerstatus | In Stock | In Stock |
| Stückpreis (USD) | $80,00 | $190,00 |
| Series | APEX-20KC | — |
| Family | APEX 20K | APEX 20K |
| Device Type | FPGA (Field Programmable Gate Array) | — |
| System Gates | 400,000 | — |
| Logic Cells / Elements | 16,640 | — |
| Total RAM Bits | 212,992 | — |
| Maximum Internal Frequency | 200 MHz | — |
| Speed Grade | -2 | -1 (standard) |
| Process Technology | 0.22 µm CMOS | — |
| Core Supply Voltage | 2.5 V | 2.5 V |
| I/O Supply Voltage | 1.71 V to 1.89 V (MultiVolt) | — |
| LVDS Support | Yes | — |
| PLLs | 4 | — |
| Pin-Anzahl | 655 | — |
| Package Type | 655-BCPGA (CPGA-655) | BGA-652 (thermally enhanced) |
| Package Dimensions | 62.48 x 62.48 mm | — |
| Montageart | Through-Hole (CPGA) | Surface Mount |
| Betriebstemperatur | [DATA_NEEDED: operating temperature range] | 0 C to +85 C |
| RoHS-Status | [DATA_NEEDED: RoHS compliance status] | Compliant (lead-free, V suffix) |
| Logic Elements (Macros) | — | 1664 |
| Typical System Gates | — | 400,000 |
| Maximum User I/O | — | 502 |
| Embedded SRAM | — | 212,992 bits |
| Propagation Delay | — | 2.5 ns |
| Logic Family | — | CMOS |
| Architecture | — | MultiCore (LUT + EAB + FastTrack interconnect) |
| Programming Interface | — | JTAG (IEEE 1149.1) / passive serial |