EP20K400GC655-3 vs EP20K400GI655-3 Vergleich
Detaillierter Direktvergleich von EP20K400GC655-3 von Intel und EP20K400GI655-3 von Altera. Vergleichen Sie die wichtigsten Spezifikationen, elektrischen Parameter, Gehäuse, Lebenszyklusstatus, Preise und Verfügbarkeit, um das beste Bauteil für Ihre Designanforderungen zu ermitteln.
Intel
EP20K400GC655-3 - 400K Gate APEX-20KC FPGA 655-BCPGA | Intel
EP20K400GC655-3 ⚠ Letzte BestellmöglichkeitSpezifikationsvergleich
| Parameter | EP20K400GC655-3 | EP20K400GI655-3 |
|---|---|---|
| Marke | Intel | Altera |
| Kategorie | FPGA & CPLD | FPGA & CPLD |
| Lebenszyklusstatus | Letzte Kaufgelegenheit | Obsolete |
| Lagerstatus | In Stock | In Stock |
| Stückpreis (USD) | $310,00 | $55,00 |
| Series | APEX-20KC | — |
| Family | APEX 20K | APEX 20KE |
| Manufacturer | Intel (formerly Altera) | — |
| Logic Elements | 16640 | — |
| Total RAM Bits | 212992 | — |
| Number of Gates | 400000 | — |
| Supply Voltage - Core | 1.71 V to 1.89 V (1.8 V nominal) | — |
| I/O Voltage Tolerance | MultiVolt I/O: 1.8 V / 2.5 V / 3.3 V / 5 V | — |
| Betriebstemperatur | -40C to +85C (industrial) | 0°C to 70°C (Industrial I grade) |
| Maximum Frequency | 167 MHz (per FPGAkey) | — |
| Process Technology | 0.22 um CMOS | CMOS, 2.5V core |
| Gehäuse / Bauform | 655-BCPGA | — |
| Supplier Device Package | 655-CPGA (62.48 x 62.48 mm) | — |
| Speed Grade | -3 (slowest grade in family) | -3 (slowest of the EP20K400 family) |
| Propagation Delay (tPD) | 3.6 ns (per Microchip USA listing) | — |
| JTAG Support | IEEE 1149.1 Boundary-Scan | — |
| Configuration Modes | Passive Serial, Passive Parallel Sync/Async, Active Serial | Passive Serial, Passive Parallel Asynchronous, JTAG |
| RoHS-Status | [DATA_NEEDED: rohs status] | [DATA_NEEDED: RoHS status] |
| Logic Elements / Cells | — | 16,640 |
| System Gates | — | 400,000 (maximum) |
| Maximum User I/O | — | 502 |
| Dedicated Inputs | — | 4 |
| Number of Terminals | — | 655 |
| Gehäuse | — | 655-Pin PGA (Plastic/CPGA, square) |
| JESD-30 Code | — | S-CPGA-P655 |
| Package Shape | — | Square |
| Form of Terminal | — | PIN/PEG (through-hole) |
| Montageart | — | Through-Hole (Socket) |
| Core Supply Voltage | — | 2.5 V |
| I/O Supply Voltage | — | 2.5 V or 3.3 V (MultiVolt I/O) |
| Embedded Memory | — | Dual-port RAM via Embedded System Blocks (ESBs) |
| JTAG / Boundary Scan | — | IEEE 1149.1 compliant |