EP20K400GI655-1V vs EP20K400GI655-2 Vergleich
Detaillierter Direktvergleich von EP20K400GI655-1V von Intel und EP20K400GI655-2 von Altera. Vergleichen Sie die wichtigsten Spezifikationen, elektrischen Parameter, Gehäuse, Lebenszyklusstatus, Preise und Verfügbarkeit, um das beste Bauteil für Ihre Designanforderungen zu ermitteln.
Intel
EP20K400GI655-1V - APEX 20K 400K Gate FPGA, 655-pin CBGA | Intel
EP20K400GI655-1V ⚠ Letzte Bestellmöglichkeit
Spezifikationsvergleich
| Parameter | EP20K400GI655-1V | EP20K400GI655-2 |
|---|---|---|
| Marke | Intel | Altera |
| Kategorie | FPGA & CPLD | FPGA & CPLD |
| Lebenszyklusstatus | Letzte Kaufgelegenheit | Obsolete |
| Lagerstatus | In Stock | In Stock |
| Stückpreis (USD) | $155,00 | $175,00 |
| Family | APEX 20K | — |
| Typical Gates | 400,000 | — |
| Logic Elements | 16,640 | — |
| Maximum User I/O | 502 | 496 |
| Dedicated Inputs | 4 | 6 |
| Package Type | CBGA-655 (Ceramic Ball Grid Array) | — |
| Package Code (JESD-30) | S-CPGA-P655 | — |
| Package Equivalence Code | SPGA655, 47x47 | — |
| Process Technology | CMOS | — |
| Propagation Delay | 2.5 ns | 3.1 ns (typical) |
| Core Supply Voltage | 2.5 V | — |
| I/O Supply Voltage | 2.5 V / 3.3 V | — |
| Configuration | In-system programmable via JTAG | — |
| Boundary Scan | IEEE 1149.1 JTAG | — |
| Betriebstemperatur | [DATA_NEEDED: industrial vs military grade] | -40C to +85C (industrial) |
| MSL-Level | 1 | — |
| Package Body Material | Ceramic | — |
| RoHS-Status | [DATA_NEEDED] | [DATA_NEEDED: RoHS status] |
| Manufacturer | — | Altera Corporation |
| Series | — | APEX 20K (EP20K400) |
| Device Type | — | Field Programmable Gate Array (FPGA) |
| Typical Gate Count | — | 400,000 gates |
| Logic Elements (LE) | — | 16,640 |
| Number of Terminals | — | 655 |
| Gehäuse | — | SPGA-655 (47 mm x 47 mm) |
| Nominal Supply Voltage | — | 2.5 V |
| Supply Voltage Range | — | 2.375 V to 2.625 V |
| Technology | — | CMOS SRAM |
| Montageart | — | Through-Hole / Socket |
| Moisture Sensitivity Level | — | 1 (per Altera family) |
| Configuration Method | — | JTAG, Passive Serial, Passive Parallel |
| I/O Standards Supported | — | LVTTL, LVCMOS, PCI, GTL+ |
| Embedded Memory | — | Embedded System Blocks (ESBs) |
| Lebenszyklusstatus | — | Obsolete (legacy Altera APEX 20K family) |