EP20K400GI655-3X vs EP20K400GI655-3 Vergleich
Detaillierter Direktvergleich von EP20K400GI655-3X von Intel und EP20K400GI655-3 von Altera. Vergleichen Sie die wichtigsten Spezifikationen, elektrischen Parameter, Gehäuse, Lebenszyklusstatus, Preise und Verfügbarkeit, um das beste Bauteil für Ihre Designanforderungen zu ermitteln.
Spezifikationsvergleich
| Parameter | EP20K400GI655-3X | EP20K400GI655-3 |
|---|---|---|
| Marke | Intel | Altera |
| Kategorie | FPGA & CPLD | FPGA & CPLD |
| Lebenszyklusstatus | Unknown | Obsolete |
| Lagerstatus | In Stock | In Stock |
| Stückpreis (USD) | $0,00 | $55,00 |
| Product Type | Field Programmable Gate Array | — |
| Device Family | APEX 20K | — |
| Logic Elements/Cells | 16,640 | — |
| Technology | CMOS | — |
| Terminal Count | 655 | — |
| Package Type | SPGA | — |
| Package Designation | SPGA655 | — |
| Package Dimensions | 47 mm x 47 mm | — |
| Power Supply | 2.5 V | — |
| Power Supply Option | 2.5/3.3 V | — |
| Montageart | [DATA_NEEDED: mounting type] | Through-Hole (Socket) |
| Betriebstemperatur | [DATA_NEEDED: operating temperature] | 0°C to 70°C (Industrial I grade) |
| I/O Count | [DATA_NEEDED: I/O count] | — |
| Embedded Memory | [DATA_NEEDED: embedded memory capacity] | Dual-port RAM via Embedded System Blocks (ESBs) |
| Configuration Method | [DATA_NEEDED: configuration method] | — |
| RoHS-Status | unknown | [DATA_NEEDED: RoHS status] |
| REACH Status | unknown | — |
| AEC-Q100 Qualification | unknown | — |
| Family | — | APEX 20KE |
| Logic Elements / Cells | — | 16,640 |
| System Gates | — | 400,000 (maximum) |
| Maximum User I/O | — | 502 |
| Dedicated Inputs | — | 4 |
| Number of Terminals | — | 655 |
| Gehäuse | — | 655-Pin PGA (Plastic/CPGA, square) |
| JESD-30 Code | — | S-CPGA-P655 |
| Package Shape | — | Square |
| Form of Terminal | — | PIN/PEG (through-hole) |
| Process Technology | — | CMOS, 2.5V core |
| Core Supply Voltage | — | 2.5 V |
| I/O Supply Voltage | — | 2.5 V or 3.3 V (MultiVolt I/O) |
| Speed Grade | — | -3 (slowest of the EP20K400 family) |
| Configuration Modes | — | Passive Serial, Passive Parallel Asynchronous, JTAG |
| JTAG / Boundary Scan | — | IEEE 1149.1 compliant |