EP20K600CB652C-8 vs EP20K600CB652C9 Vergleich
Detaillierter Direktvergleich von EP20K600CB652C-8 von Altera und EP20K600CB652C9 von Altera. Vergleichen Sie die wichtigsten Spezifikationen, elektrischen Parameter, Gehäuse, Lebenszyklusstatus, Preise und Verfügbarkeit, um das beste Bauteil für Ihre Designanforderungen zu ermitteln.
Spezifikationsvergleich
| Parameter | EP20K600CB652C-8 | EP20K600CB652C9 |
|---|---|---|
| Marke | Altera | Altera |
| Kategorie | FPGA & CPLD | FPGA & CPLD |
| Lebenszyklusstatus | Obsolete | Obsolete |
| Lagerstatus | In Stock | In Stock |
| Stückpreis (USD) | $86,00 | $142,50 |
| Series | APEX 20KC | — |
| Family | APEX 20KC (MultiCore) | APEX 20KC |
| Typical Gates | 600,000 | — |
| Logic Elements | 24,320 | — |
| Embedded RAM | 311,296 bits | — |
| User I/Os | 488 | — |
| Propagation Delay | 1.48 ns (per published source) | — |
| Gehäuse | 652-BGA (LBGA, 45 x 45 mm, 1.27 mm pitch) | 652-BGA (45 × 45 mm, 1.27 mm pitch) |
| Montageart | Surface Mount (thermally enhanced) | Surface Mount (BGA) |
| Betriebstemperatur | 0 C to 85 C (commercial) | 0 °C to 85 °C (commercial) |
| Speed Grade | -8 (slowest, most timing margin) | — |
| VCCIO Options | 1.8 V / 2.5 V / 3.3 V | — |
| Process | 0.15 µm all-layer copper metal | — |
| PCI Compliance | PCI Local Bus Rev 2.2 at 33/66 MHz, 32/64-bit | — |
| Memory Interface Support | DDR SDRAM, ZBT SRAM, QDR SRAM, LVDS | — |
| Configuration | Enhanced (EPC) bitstream | JTAG IEEE 1149.1 / serial / EPC2-compatible |
| Logic Elements / Cells | — | 24,320 |
| Number of LABs / CLBs | — | 2,432 |
| System Gates | — | 1,537,000 |
| Total RAM Bits | — | 311,296 |
| User I/O | — | 488 |
| Number of I/O Banks | — | [DATA_NEEDED: I/O bank count] |
| Versorgungsspannung | — | 1.71 V to 1.89 V |
| Process Technology | — | 0.15 µm all-layer copper CMOS |
| Internal Datapath Frequency | — | up to 250 MHz |
| Propagation Delay (typ.) | — | 1.48 ns |
| RoHS-Status | — | Compliant (per Altera product page) |
| Product Status | — | Obsolete (per distributor listings) |