EP20K600CB652C7 vs EP20K600CB652C-8 Vergleich
Detaillierter Direktvergleich von EP20K600CB652C7 von Altera und EP20K600CB652C-8 von Altera. Vergleichen Sie die wichtigsten Spezifikationen, elektrischen Parameter, Gehäuse, Lebenszyklusstatus, Preise und Verfügbarkeit, um das beste Bauteil für Ihre Designanforderungen zu ermitteln.
Spezifikationsvergleich
| Parameter | EP20K600CB652C7 | EP20K600CB652C-8 |
|---|---|---|
| Marke | Altera | Altera |
| Kategorie | FPGA & CPLD | FPGA & CPLD |
| Lebenszyklusstatus | Obsolete | Obsolete |
| Lagerstatus | In Stock | In Stock |
| Stückpreis (USD) | $1.320,00 | $86,00 |
| Series | APEX 20K | APEX 20KC |
| Family | APEX 20KC | APEX 20KC (MultiCore) |
| System Gates | 600,000 | — |
| Logic Elements | 24,320 | 24,320 |
| Embedded RAM | 311,296 bits | 311,296 bits |
| User I/O Count | 488 | — |
| Gehäuse | 652-ball BGA | 652-BGA (LBGA, 45 x 45 mm, 1.27 mm pitch) |
| Process Technology | 0.15 µm CMOS (all-layer copper interconnect) | — |
| Core Voltage | 1.8 V | — |
| I/O Voltage Support | 1.8V / 2.5V / 3.3V / 5V (MultiVolt) | — |
| Maximum Frequency | 375.94 MHz | — |
| Architecture | MultiCore (LUT + embedded memory) | — |
| Betriebstemperatur | Commercial (0C to +70C) | 0 C to 85 C (commercial) |
| Speed Grade | C7 | -8 (slowest, most timing margin) |
| RoHS-Status | [DATA_NEEDED: RoHS compliance status] | — |
| Typical Gates | — | 600,000 |
| User I/Os | — | 488 |
| Propagation Delay | — | 1.48 ns (per published source) |
| Montageart | — | Surface Mount (thermally enhanced) |
| VCCIO Options | — | 1.8 V / 2.5 V / 3.3 V |
| Process | — | 0.15 µm all-layer copper metal |
| PCI Compliance | — | PCI Local Bus Rev 2.2 at 33/66 MHz, 32/64-bit |
| Memory Interface Support | — | DDR SDRAM, ZBT SRAM, QDR SRAM, LVDS |
| Configuration | — | Enhanced (EPC) bitstream |