EP20K600CB652C8N vs EP20K600CB652C-8 Vergleich

Detaillierter Direktvergleich von EP20K600CB652C8N von Altera und EP20K600CB652C-8 von Altera. Vergleichen Sie die wichtigsten Spezifikationen, elektrischen Parameter, Gehäuse, Lebenszyklusstatus, Preise und Verfügbarkeit, um das beste Bauteil für Ihre Designanforderungen zu ermitteln.

Spezifikationsvergleich

Parameter EP20K600CB652C8N EP20K600CB652C-8
Marke Altera Altera
Kategorie FPGA & CPLD FPGA & CPLD
Lebenszyklusstatus Obsolete Obsolete
Lagerstatus In Stock In Stock
Stückpreis (USD) $115,00 $86,00
Family APEX 20KC APEX 20KC (MultiCore)
Device Type Loadable PLD / FPGA —
System Gates 600,000 —
Logic Elements 24,320 cells 24,320
Embedded Memory 311,296 bits —
User I/O Pins 488 —
Dedicated Inputs 4 —
Outputs 480 —
Propagation Delay (typ.) 1.48 ns —
Pin-to-Pin Timing 1.78 ns —
Internal Frequency (typ.) 301.21 MHz —
Core Supply Voltage 1.8 V nominal (1.71 V to 1.89 V) —
Process Technology 0.18 µm all-layer copper-metal —
Speed Grade C8 -8 (slowest, most timing margin)
Betriebstemperatur 0 °C to 85 °C (commercial) 0 C to 85 C (commercial)
Gehäuse 652-ball LBGA, 45 x 45 mm, 1.27 mm pitch 652-BGA (LBGA, 45 x 45 mm, 1.27 mm pitch)
Montageart Surface Mount (BGA) Surface Mount (thermally enhanced)
Architecture MultiCore LUT + Embedded System Blocks (ESB) —
Pin-Compatible With APEX 20KE family —
RoHS-Status unknown —
Series — APEX 20KC
Typical Gates — 600,000
Embedded RAM — 311,296 bits
User I/Os — 488
Propagation Delay — 1.48 ns (per published source)
VCCIO Options — 1.8 V / 2.5 V / 3.3 V
Process — 0.15 µm all-layer copper metal
PCI Compliance — PCI Local Bus Rev 2.2 at 33/66 MHz, 32/64-bit
Memory Interface Support — DDR SDRAM, ZBT SRAM, QDR SRAM, LVDS
Configuration — Enhanced (EPC) bitstream

Datenblätter & Ressourcen

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