EP20K600CB652C9 vs EP20K600EBC652-3 Vergleich

Detaillierter Direktvergleich von EP20K600CB652C9 von Altera und EP20K600EBC652-3 von Intel. Vergleichen Sie die wichtigsten Spezifikationen, elektrischen Parameter, Gehäuse, Lebenszyklusstatus, Preise und Verfügbarkeit, um das beste Bauteil für Ihre Designanforderungen zu ermitteln.

Spezifikationsvergleich

Parameter EP20K600CB652C9 EP20K600EBC652-3
Marke Altera Intel
Kategorie FPGA & CPLD FPGA & CPLD
Lebenszyklusstatus Obsolete Obsolete
Lagerstatus In Stock In Stock
Stückpreis (USD) $142,50 $340,00
Family APEX 20KC APEX 20K
Logic Elements / Cells 24,320 —
Number of LABs / CLBs 2,432 —
System Gates 1,537,000 —
Total RAM Bits 311,296 —
User I/O 488 —
Number of I/O Banks [DATA_NEEDED: I/O bank count] —
Versorgungsspannung 1.71 V to 1.89 V —
Process Technology 0.15 µm all-layer copper CMOS 0.15-micron all-layer copper CMOS
Internal Datapath Frequency up to 250 MHz —
Propagation Delay (typ.) 1.48 ns —
Betriebstemperatur 0 °C to 85 °C (commercial) 0 C to 85 C
Gehäuse 652-BGA (45 × 45 mm, 1.27 mm pitch) —
Montageart Surface Mount (BGA) Surface Mount
Configuration JTAG IEEE 1149.1 / serial / EPC2-compatible —
RoHS-Status Compliant (per Altera product page) [DATA_NEEDED: RoHS status]
Product Status Obsolete (per distributor listings) —
Series — APEX-20KE
Device Type — FPGA (Field Programmable Gate Array) / SPLD Loadable
Logic Elements — 24320
Embedded Memory — 311296 bits
User I/Os — 488
Number of Terminals — 652
Package Type — BGA-652 (45 x 45 mm, 1.27 mm pitch)
Propagation Delay — 1.48 ns
Speed Grade — -3
Core Voltage — [DATA_NEEDED: core voltage]
I/O Voltage Support — Multi-volt 3.3 V / 2.5 V / 1.8 V
Configuration Method — JTAG / serial / passive parallel
PLLs — 4
Lead-Free — [DATA_NEEDED: lead-free]

Datenblätter & Ressourcen

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