EP20K600CB652I7N vs EP20K600CB652C7N Vergleich
Detaillierter Direktvergleich von EP20K600CB652I7N von Altera und EP20K600CB652C7N von Intel. Vergleichen Sie die wichtigsten Spezifikationen, elektrischen Parameter, Gehäuse, Lebenszyklusstatus, Preise und Verfügbarkeit, um das beste Bauteil für Ihre Designanforderungen zu ermitteln.
Spezifikationsvergleich
| Parameter | EP20K600CB652I7N | EP20K600CB652C7N |
|---|---|---|
| Marke | Altera | Intel |
| Kategorie | FPGA & CPLD | FPGA & CPLD |
| Lebenszyklusstatus | Obsolete | Obsolete |
| Lagerstatus | In Stock | In Stock |
| Stückpreis (USD) | $158,00 | $305,00 |
| Family | APEX 20KC | APEX 20KC |
| Typical Gates | 600,000 | — |
| Logic Elements (Cells) | 24,320 | — |
| Maximum Operating Frequency | 375.94 MHz | — |
| Process Technology | 0.15 µm CMOS | 0.15 um all-layer copper-metal |
| Core Supply Voltage (VCCINT) | 1.8 V | — |
| Gehäuse | 652-pin FineLine BGA | 652-ball BGA (PBGA-652, S-PBGA-B652) |
| Montageart | Surface Mount (BGA) | — |
| User I/O Banks | [DATA_NEEDED: User I/O Banks] | — |
| Maximum User I/O | [DATA_NEEDED: Maximum User I/O] | — |
| Embedded System Block (ESB) Memory | 311,040 bits | — |
| Phase-Locked Loops (PLLs) | 4 | — |
| Operating Temperature Grade | Industrial (-40C to +100C) | — |
| Speed Grade | 7 | — |
| Configuration Method | SRAM-based, JTAG (IEEE 1149.1) | — |
| RoHS-Status | unknown | [DATA_NEEDED: RoHS status] |
| Device Type | — | SPLD / Loadable PLD (FPGA) |
| System Gates | — | 600,000 |
| Logic Elements | — | 24,320 |
| Embedded Memory (bits) | — | 311,296 |
| Maximum User I/Os | — | 488 |
| Propagation Delay | — | 1.48 ns |
| Internal Operating Frequency | — | 375.94 MHz |
| Core Supply Voltage | — | 1.8 V |
| Package Dimensions | — | 45 x 45 mm |
| Ball Pitch | — | 1.27 mm |
| Betriebstemperatur | — | 0 C to 85 C |