EP20K600CEF672C7 vs EP20K600CF672-1X Vergleich
Detaillierter Direktvergleich von EP20K600CEF672C7 von Intel und EP20K600CF672-1X von Intel. Vergleichen Sie die wichtigsten Spezifikationen, elektrischen Parameter, Gehäuse, Lebenszyklusstatus, Preise und Verfügbarkeit, um das beste Bauteil für Ihre Designanforderungen zu ermitteln.
Spezifikationsvergleich
| Parameter | EP20K600CEF672C7 | EP20K600CF672-1X |
|---|---|---|
| Marke | Intel | Intel |
| Kategorie | FPGA & CPLD | FPGA & CPLD |
| Lebenszyklusstatus | Obsolete | NRND |
| Lagerstatus | In Stock | In Stock |
| Stückpreis (USD) | $98,40 | $95,00 |
| Manufacturer | Intel (formerly Altera) | — |
| Series | APEX 20KC | APEX 20KC |
| Family | APEX 20KC (Enhanced Configuration) | — |
| Device Type | FPGA / Loadable PLD | — |
| Logic Elements / Cells | 24,320 | — |
| Gate Count (typical) | 600,000 gates | — |
| Maximum Operating Frequency | 375.94 MHz | — |
| Propagation Delay | 1.48 ns (typ) | — |
| User I/Os | 488 | — |
| Core Supply Voltage | 1.8 V | — |
| Process Technology | 0.15 µm CMOS, all-layer copper | 0.18 um SRAM CMOS |
| Gehäuse | 672-ball FineLine BGA (FC-FBGA) | 672-ball BGA (CF672), 1.27 mm pitch |
| Package Code | BGA-652, 45 x 45 mm, 1.27 mm pitch | — |
| Betriebstemperatur | 0 °C to +85 °C (commercial) | [DATA_NEEDED: industrial temp range] |
| Configuration | SRAM-based, serial or parallel (EPC) | — |
| Embedded Memory | EAB blocks (dual-port RAM with byte enables) | — |
| LVDS Support | True-LVDS channels integrated | — |
| MultiVolt I/O | 1.8 V, 2.5 V, 3.3 V interfaces | — |
| External Memory Interface | DDR SDRAM, QDR SRAM | — |
| JTAG Support | IEEE 1149.1 boundary-scan | — |
| RoHS-Status | [DATA_NEEDED: RoHS status] | Compliant (per Alibaba distributor listing: "RoHS Compliant") |
| Device Family | — | APEX 20KC MultiCore FPGA |
| Maximum Typical Gates | — | 600,000 |
| Logic Elements | — | 31,104 (per Altera APEX 20KC datasheet family) |
| Embedded System Blocks (ESBs) | — | up to 256 |
| Embedded Memory (max bits) | — | [DATA_NEEDED: ESB RAM bits] |
| PLLs | — | 4 |
| Maximum User I/O | — | [DATA_NEEDED: max user I/O count] |
| Speed Grade | — | -1 (industrial speed grade, X = lead-free) |
| Configuration Method | — | SRAM, JTAG (IEEE 1149.1), EPC passive serial |
| Versorgungsspannung | — | [DATA_NEEDED: VCCINT/VCCIO] |
| Montageart | — | Surface Mount (BGA) |
| MSL-Level | — | [DATA_NEEDED: MSL rating] |