EP20K600CF672 vs EP20K600CEF672C7 Vergleich
Detaillierter Direktvergleich von EP20K600CF672 von Intel und EP20K600CEF672C7 von Intel. Vergleichen Sie die wichtigsten Spezifikationen, elektrischen Parameter, Gehäuse, Lebenszyklusstatus, Preise und Verfügbarkeit, um das beste Bauteil für Ihre Designanforderungen zu ermitteln.
Intel
EP20K600CF672 - 600K APEX 20KC FPGA, 672-BGA | Intel
EP20K600CF672 [data_needed: lifecycle status]
Spezifikationsvergleich
| Parameter | EP20K600CF672 | EP20K600CEF672C7 |
|---|---|---|
| Marke | Intel | Intel |
| Kategorie | FPGA & CPLD | FPGA & CPLD |
| Lebenszyklusstatus | [DATA NEEDED: Lifecycle Status] | Obsolete |
| Lagerstatus | In Stock | In Stock |
| Stückpreis (USD) | $0,00 | $98,40 |
| Product Type | Field-Programmable Gate Array (FPGA) | — |
| Product Family | APEX-20KC | — |
| Manufacturer | Altera / Intel | Intel (formerly Altera) |
| User I/O Lines | 508 I/O | — |
| Logic Elements | [DATA_NEEDED: logic element count] | — |
| Propagation Delay | 1.48 ns for supplied EP20K600CF672C9N/C8N references | 1.48 ns (typ) |
| Device Type Listed by Supplied References | SPLD | — |
| Process Technology | 0.15 um all-layer copper-metal process for supplied family references | 0.15 µm CMOS, all-layer copper |
| Performance Claim | Up to 35% faster than APEX 20KE devices | — |
| Package Type | 672-ball BGA, FCBGA | — |
| Package Dimensions | 45 mm x 45 mm | — |
| Ball Pitch | 1.27 mm | — |
| Montageart | Surface Mount | — |
| Betriebstemperatur | 0 C to 85 C for supplied EP20K600CF672C9N/C8N references | 0 °C to +85 °C (commercial) |
| Configuration Device Type | Enhanced Configuration (EPC) device | — |
| Core Voltage | [DATA_NEEDED: core supply voltage] | — |
| I/O Voltage | [DATA_NEEDED: I/O supply voltage] | — |
| Configuration Memory | [DATA_NEEDED: configuration memory type and capacity] | — |
| Embedded Memory | [DATA_NEEDED: embedded memory capacity] | EAB blocks (dual-port RAM with byte enables) |
| RoHS-Status | unknown | [DATA_NEEDED: RoHS status] |
| REACH Status | unknown | — |
| AEC-Q100 Status | unknown | — |
| Series | — | APEX 20KC |
| Family | — | APEX 20KC (Enhanced Configuration) |
| Device Type | — | FPGA / Loadable PLD |
| Logic Elements / Cells | — | 24,320 |
| Gate Count (typical) | — | 600,000 gates |
| Maximum Operating Frequency | — | 375.94 MHz |
| User I/Os | — | 488 |
| Core Supply Voltage | — | 1.8 V |
| Gehäuse | — | 672-ball FineLine BGA (FC-FBGA) |
| Package Code | — | BGA-652, 45 x 45 mm, 1.27 mm pitch |
| Configuration | — | SRAM-based, serial or parallel (EPC) |
| LVDS Support | — | True-LVDS channels integrated |
| MultiVolt I/O | — | 1.8 V, 2.5 V, 3.3 V interfaces |
| External Memory Interface | — | DDR SDRAM, QDR SRAM |
| JTAG Support | — | IEEE 1149.1 boundary-scan |