EP20K600CF672C7 vs EP20K600CEF672C7 Vergleich
Detaillierter Direktvergleich von EP20K600CF672C7 von Intel und EP20K600CEF672C7 von Intel. Vergleichen Sie die wichtigsten Spezifikationen, elektrischen Parameter, Gehäuse, Lebenszyklusstatus, Preise und Verfügbarkeit, um das beste Bauteil für Ihre Designanforderungen zu ermitteln.
Spezifikationsvergleich
| Parameter | EP20K600CF672C7 | EP20K600CEF672C7 |
|---|---|---|
| Marke | Intel | Intel |
| Kategorie | FPGA & CPLD | FPGA & CPLD |
| Lebenszyklusstatus | Obsolete | Obsolete |
| Lagerstatus | In Stock | In Stock |
| Stückpreis (USD) | $2.267,89 | $98,40 |
| Family | APEX-20KC | APEX 20KC (Enhanced Configuration) |
| Device Type | SPLD / FPGA | FPGA / Loadable PLD |
| System Gates | 600,000 | — |
| Logic Cells | 24,320 | — |
| User I/O | 508 | — |
| Gehäuse | 672-ball FC-FBGA (27x27 mm) | 672-ball FineLine BGA (FC-FBGA) |
| Ball Pitch | 1.27 mm | — |
| Core Voltage (VCCINT) | 1.71 V to 1.89 V | — |
| Process Technology | 0.15 um CMOS, all-layer copper | 0.15 µm CMOS, all-layer copper |
| Propagation Delay (typ.) | 1.48 ns | — |
| Betriebstemperatur | 0C to 85C (commercial) | 0 °C to +85 °C (commercial) |
| Speed Grade | C7 | — |
| Embedded Memory | Dual-port RAM via ESBs | EAB blocks (dual-port RAM with byte enables) |
| CAM Support | Yes (ESB-based content-addressable memory) | — |
| Montageart | Surface Mount | — |
| RoHS-Status | Compliant | [DATA_NEEDED: RoHS status] |
| Manufacturer | — | Intel (formerly Altera) |
| Series | — | APEX 20KC |
| Logic Elements / Cells | — | 24,320 |
| Gate Count (typical) | — | 600,000 gates |
| Maximum Operating Frequency | — | 375.94 MHz |
| Propagation Delay | — | 1.48 ns (typ) |
| User I/Os | — | 488 |
| Core Supply Voltage | — | 1.8 V |
| Package Code | — | BGA-652, 45 x 45 mm, 1.27 mm pitch |
| Configuration | — | SRAM-based, serial or parallel (EPC) |
| LVDS Support | — | True-LVDS channels integrated |
| MultiVolt I/O | — | 1.8 V, 2.5 V, 3.3 V interfaces |
| External Memory Interface | — | DDR SDRAM, QDR SRAM |
| JTAG Support | — | IEEE 1149.1 boundary-scan |