EP20K600CF672C8N vs EP20K600CF672I-8ES Vergleich
Detaillierter Direktvergleich von EP20K600CF672C8N von Intel und EP20K600CF672I-8ES von Altera. Vergleichen Sie die wichtigsten Spezifikationen, elektrischen Parameter, Gehäuse, Lebenszyklusstatus, Preise und Verfügbarkeit, um das beste Bauteil für Ihre Designanforderungen zu ermitteln.
Altera
EP20K600CF672I-8ES - APEX 20KC 600K-Gate FPGA, 672-BGA | Intel / Altera
EP20K600CF672I-8ES ObsoleteSpezifikationsvergleich
| Parameter | EP20K600CF672C8N | EP20K600CF672I-8ES |
|---|---|---|
| Marke | Intel | Altera |
| Kategorie | FPGA & CPLD | FPGA & CPLD |
| Lebenszyklusstatus | Aktiv | Obsolete |
| Lagerstatus | In Stock | In Stock |
| Stückpreis (USD) | $108,00 | $119,00 |
| Device Type | SPLD | — |
| Product Type | FPGA / programmable logic device | — |
| Family | APEX 20KC | APEX 20KC |
| Nominal Gate Capacity | 600K gates | — |
| Logic Elements or Cells | 24,320 | — |
| Macros | 2,432 | — |
| User I/O Count | 508 | — |
| Package Terminals | 652 pins | — |
| Gehäuse | BGA-652, 45 x 45 mm, 1.27 mm pitch | 672-ball BGA (FineLine BGA, 1.27 mm pitch) |
| Package Description | 672-pin FC-FBGA | — |
| Versorgungsspannung | 1.8 V | — |
| Listed Frequency | 301.21 MHz | — |
| Propagation Delay | 1.48 ns | — |
| Fabrication Process | 0.15 µm | — |
| Betriebstemperatur | 0°C to 85°C | -40C to +100C (Industrial) |
| Interconnect Metal | All-layer copper metal | — |
| I/O Configuration | 508 user I/O | — |
| Montageart | Surface mount | — |
| RoHS-Status | unknown | Non-compliant (legacy Altera leaded BGA process) |
| REACH Status | unknown | — |
| AEC-Q100 Qualification | unknown | — |
| Configuration Method | [DATA_NEEDED: configuration memory and programming method] | — |
| Core Current | [DATA_NEEDED: core supply current] | — |
| I/O Bank Voltage | [DATA_NEEDED: supported I/O voltage range] | — |
| Junction Temperature | [DATA_NEEDED: maximum junction temperature] | — |
| Wärmewiderstand | [DATA_NEEDED: junction-to-ambient thermal resistance] | — |
| Logic Elements | — | 24,320 |
| Typical Gates | — | 600,000 (ASIC-equivalent) |
| Embedded Memory Bits | — | 311,296 |
| Maximum User I/O Pins | — | 508 |
| Embedded PLLs | — | 4 |
| Core Voltage | — | 1.8 V |
| I/O Standards Supported | — | LVTTL, LVCMOS, PCI, SSTL, HSTL, GTL+ |
| Process Technology | — | 0.18 micron CMOS SRAM |
| Speed Grade | — | -8 (slower) |
| Configuration Modes | — | Passive Serial, Fast Passive Parallel, Passive Parallel Asynchronous, JTAG |
| In-System Programmability | — | Yes (ISP via EPC16, EPC8, EPC4, EPC2, EPC1) |
| MSL-Level | — | [DATA_NEEDED: moisture sensitivity level] |