EP20K600CF672C8N vs EP20K600CF672I8AA Vergleich
Detaillierter Direktvergleich von EP20K600CF672C8N von Intel und EP20K600CF672I8AA von Intel. Vergleichen Sie die wichtigsten Spezifikationen, elektrischen Parameter, Gehäuse, Lebenszyklusstatus, Preise und Verfügbarkeit, um das beste Bauteil für Ihre Designanforderungen zu ermitteln.
Intel
EP20K600CF672I8AA - APEX 20KC 600K Gate FPGA | Intel
EP20K600CF672I8AA ⚠ Letzte BestellmöglichkeitSpezifikationsvergleich
| Parameter | EP20K600CF672C8N | EP20K600CF672I8AA |
|---|---|---|
| Marke | Intel | Intel |
| Kategorie | FPGA & CPLD | FPGA & CPLD |
| Lebenszyklusstatus | Aktiv | Letzte Kaufgelegenheit |
| Lagerstatus | In Stock | In Stock |
| Stückpreis (USD) | $108,00 | $97,50 |
| Device Type | SPLD | — |
| Product Type | FPGA / programmable logic device | — |
| Family | APEX 20KC | — |
| Nominal Gate Capacity | 600K gates | — |
| Logic Elements or Cells | 24,320 | — |
| Macros | 2,432 | — |
| User I/O Count | 508 | — |
| Package Terminals | 652 pins | — |
| Gehäuse | BGA-652, 45 x 45 mm, 1.27 mm pitch | 672-FBGA (27 x 27 mm) |
| Package Description | 672-pin FC-FBGA | — |
| Versorgungsspannung | 1.8 V | 1.71 V to 1.89 V |
| Listed Frequency | 301.21 MHz | — |
| Propagation Delay | 1.48 ns | — |
| Fabrication Process | 0.15 µm | — |
| Betriebstemperatur | 0°C to 85°C | -40C to +85C (industrial) |
| Interconnect Metal | All-layer copper metal | — |
| I/O Configuration | 508 user I/O | — |
| Montageart | Surface mount | Surface Mount |
| RoHS-Status | unknown | Compliant |
| REACH Status | unknown | — |
| AEC-Q100 Qualification | unknown | — |
| Configuration Method | [DATA_NEEDED: configuration memory and programming method] | — |
| Core Current | [DATA_NEEDED: core supply current] | — |
| I/O Bank Voltage | [DATA_NEEDED: supported I/O voltage range] | — |
| Junction Temperature | [DATA_NEEDED: maximum junction temperature] | — |
| Wärmewiderstand | [DATA_NEEDED: junction-to-ambient thermal resistance] | — |
| Series | — | APEX 20KC |
| Logic Elements / Cells | — | 24,320 |
| Total Gates | — | 600,000 (system gates) |
| Total RAM Bits | — | 311,296 |
| Number of I/O | — | 508 |
| Number of LABs/CLBs | — | 1,520 |
| Technology | — | 0.15 um CMOS |
| I/O Standards | — | LVTTL, LVCMOS, PCI, GTL, SSTL-2/3, HSTL, LVDS, LVPECL |
| Number of PLLs | — | 4 |
| Speed Grade | — | I8 |
| Lead Free | — | Yes |
| Number of Logic Array Blocks | — | 1,520 (40 LABs per MegaLAB) |