EP20K600CF672C9 vs EP20K600CF672-1X Vergleich

Detaillierter Direktvergleich von EP20K600CF672C9 von Intel und EP20K600CF672-1X von Intel. Vergleichen Sie die wichtigsten Spezifikationen, elektrischen Parameter, Gehäuse, Lebenszyklusstatus, Preise und Verfügbarkeit, um das beste Bauteil für Ihre Designanforderungen zu ermitteln.

Spezifikationsvergleich

Parameter EP20K600CF672C9 EP20K600CF672-1X
Marke Intel Intel
Kategorie FPGA & CPLD FPGA & CPLD
Lebenszyklusstatus NRND NRND
Lagerstatus In Stock In Stock
Stückpreis (USD) $171,00 $95,00
Device Family APEX 20KC APEX 20KC MultiCore FPGA
Typical Gate Count 600,000 gates —
Logic Elements (LEs) 24,320 —
Maximum User I/O 488 pins [DATA_NEEDED: max user I/O count]
Embedded Memory (EAB) 311 Kbits —
Propagation Delay 1.48 ns —
Maximum Internal Frequency 250 MHz —
Core Voltage 1.8 V —
Process Technology 0.15 µm all-layer copper-metal 0.18 um SRAM CMOS
Package Type 672-pin FC-FBGA —
Package Dimensions 45 x 45 mm, 1.27 mm pitch —
Total Pin Count 652 balls —
Betriebstemperatur 0 °C to +85 °C (commercial) [DATA_NEEDED: industrial temp range]
Configuration Interface IEEE 1149.1 JTAG / passive serial / EPC configuration —
RoHS-Status [DATA_NEEDED: RoHS status] Compliant (per Alibaba distributor listing: "RoHS Compliant")
Series — APEX 20KC
Maximum Typical Gates — 600,000
Logic Elements — 31,104 (per Altera APEX 20KC datasheet family)
Embedded System Blocks (ESBs) — up to 256
Embedded Memory (max bits) — [DATA_NEEDED: ESB RAM bits]
PLLs — 4
Gehäuse — 672-ball BGA (CF672), 1.27 mm pitch
Speed Grade — -1 (industrial speed grade, X = lead-free)
Configuration Method — SRAM, JTAG (IEEE 1149.1), EPC passive serial
Versorgungsspannung — [DATA_NEEDED: VCCINT/VCCIO]
Montageart — Surface Mount (BGA)
MSL-Level — [DATA_NEEDED: MSL rating]

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