EP20K600CF672I-8ES vs EP20K600CF672C9N Vergleich

Detaillierter Direktvergleich von EP20K600CF672I-8ES von Altera und EP20K600CF672C9N von Intel. Vergleichen Sie die wichtigsten Spezifikationen, elektrischen Parameter, Gehäuse, Lebenszyklusstatus, Preise und Verfügbarkeit, um das beste Bauteil für Ihre Designanforderungen zu ermitteln.

Spezifikationsvergleich

Parameter EP20K600CF672I-8ES EP20K600CF672C9N
Marke Altera Intel
Kategorie FPGA & CPLD FPGA & CPLD
Lebenszyklusstatus Obsolete Obsolete
Lagerstatus In Stock In Stock
Stückpreis (USD) $119,00 $175,00
Family APEX 20KC APEX 20KC
Logic Elements 24,320 24,320
Typical Gates 600,000 (ASIC-equivalent) —
Embedded Memory Bits 311,296 —
Maximum User I/O Pins 508 —
Embedded PLLs 4 —
Core Voltage 1.8 V —
I/O Standards Supported LVTTL, LVCMOS, PCI, SSTL, HSTL, GTL+ —
Process Technology 0.18 micron CMOS SRAM 0.15 µm all-layer copper
Speed Grade -8 (slower) —
Betriebstemperatur -40C to +100C (Industrial) 0 C to 85 C (commercial)
Gehäuse 672-ball BGA (FineLine BGA, 1.27 mm pitch) —
Configuration Modes Passive Serial, Fast Passive Parallel, Passive Parallel Asynchronous, JTAG —
In-System Programmability Yes (ISP via EPC16, EPC8, EPC4, EPC2, EPC1) —
RoHS-Status Non-compliant (legacy Altera leaded BGA process) [DATA_NEEDED: RoHS status]
MSL-Level [DATA_NEEDED: moisture sensitivity level] —
Device Type — Loadable PLD / SRAM FPGA
System Gates — 600,000
Maximum Operating Frequency — 250 MHz
Propagation Delay — 1.48 ns (per logic element)
Core Supply Voltage — 1.71 V to 1.89 V (1.8 V nominal)
User I/Os — 488
Total Terminals — 672
Package Type — FineLine BGA (FC-FBGA), 1.00 mm pitch, 45 x 45 mm
Montageart — Surface Mount
Configuration Interface — JTAG (IEEE 1149.1), passive serial, active serial
Embedded Memory — MultiCore EABs supporting up to 311,000 RAM bits

Datenblätter & Ressourcen

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