EP20K600CF672I-8ES vs EP20K600CF672I7N Vergleich

Detaillierter Direktvergleich von EP20K600CF672I-8ES von Altera und EP20K600CF672I7N von Intel. Vergleichen Sie die wichtigsten Spezifikationen, elektrischen Parameter, Gehäuse, Lebenszyklusstatus, Preise und Verfügbarkeit, um das beste Bauteil für Ihre Designanforderungen zu ermitteln.

Spezifikationsvergleich

Parameter EP20K600CF672I-8ES EP20K600CF672I7N
Marke Altera Intel
Kategorie FPGA & CPLD FPGA & CPLD
Lebenszyklusstatus Obsolete Obsolete
Lagerstatus In Stock In Stock
Stückpreis (USD) $119,00 $232,00
Family APEX 20KC APEX 20KC
Logic Elements 24,320 24,320
Typical Gates 600,000 (ASIC-equivalent) —
Embedded Memory Bits 311,296 —
Maximum User I/O Pins 508 508
Embedded PLLs 4 —
Core Voltage 1.8 V —
I/O Standards Supported LVTTL, LVCMOS, PCI, SSTL, HSTL, GTL+ —
Process Technology 0.18 micron CMOS SRAM —
Speed Grade -8 (slower) I7 (-40 °C to +100 °C industrial)
Betriebstemperatur -40C to +100C (Industrial) —
Gehäuse 672-ball BGA (FineLine BGA, 1.27 mm pitch) 672-ball FineLine BGA (FC-FBGA)
Configuration Modes Passive Serial, Fast Passive Parallel, Passive Parallel Asynchronous, JTAG —
In-System Programmability Yes (ISP via EPC16, EPC8, EPC4, EPC2, EPC1) —
RoHS-Status Non-compliant (legacy Altera leaded BGA process) [DATA_NEEDED: RoHS compliance]
MSL-Level [DATA_NEEDED: moisture sensitivity level] —
Technology — 0.15 µm CMOS
Maximum System Gates — 600,000
Maximum Internal Frequency — 376 MHz
Embedded System Blocks (ESBs) — 160
Total Embedded RAM (max) — 311,296 bits
Core Voltage (VCCINT) — 1.8 V
I/O Voltage (VCCIO) — 2.5 V / 3.3 V (MultiVolt, bank-dependent)
Ball Pitch — 1.0 mm
Package Body Size — 27 mm × 27 mm
Propagation Delay (typical) — 1.6 ns
Configuration Method — JTAG (IEEE 1149.1) + EPC configuration device
Lead-Free Finish (N suffix) — Yes

Datenblätter & Ressourcen

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