EP20K600CF672I7N vs EP20K400CF672I7N Vergleich
Detaillierter Direktvergleich von EP20K600CF672I7N von Intel und EP20K400CF672I7N von Intel. Vergleichen Sie die wichtigsten Spezifikationen, elektrischen Parameter, Gehäuse, Lebenszyklusstatus, Preise und Verfügbarkeit, um das beste Bauteil für Ihre Designanforderungen zu ermitteln.
Spezifikationsvergleich
| Parameter | EP20K600CF672I7N | EP20K400CF672I7N |
|---|---|---|
| Marke | Intel | Intel |
| Kategorie | FPGA & CPLD | FPGA & CPLD |
| Lebenszyklusstatus | Obsolete | Obsolete |
| Lagerstatus | In Stock | In Stock |
| Stückpreis (USD) | $232,00 | $620,00 |
| Family | APEX 20KC | APEX 20KC |
| Technology | 0.15 µm CMOS | — |
| Maximum System Gates | 600,000 | — |
| Logic Elements | 24,320 | — |
| Maximum User I/O Pins | 508 | — |
| Maximum Internal Frequency | 376 MHz | — |
| Embedded System Blocks (ESBs) | 160 | — |
| Total Embedded RAM (max) | 311,296 bits | — |
| Core Voltage (VCCINT) | 1.8 V | — |
| I/O Voltage (VCCIO) | 2.5 V / 3.3 V (MultiVolt, bank-dependent) | — |
| Gehäuse | 672-ball FineLine BGA (FC-FBGA) | 672-ball FC-FBGA (Flip-Chip Fine-pitch BGA) |
| Ball Pitch | 1.0 mm | — |
| Package Body Size | 27 mm × 27 mm | — |
| Speed Grade | I7 (-40 °C to +100 °C industrial) | — |
| Propagation Delay (typical) | 1.6 ns | — |
| Configuration Method | JTAG (IEEE 1149.1) + EPC configuration device | — |
| Lead-Free Finish (N suffix) | Yes | — |
| RoHS-Status | [DATA_NEEDED: RoHS compliance] | [DATA_NEEDED: RoHS status] |
| Number of Logic Elements / Cells | — | 16640 |
| Number of LABs/CLBs | — | 502 |
| Total RAM Bits | — | 212992 |
| System Gates | — | 400000 |
| Maximum Operating Frequency | — | 375.94 MHz |
| Process Technology | — | 0.15 µm CMOS |
| Core Supply Voltage (VCCINT) | — | 1.8 V |
| I/O Supply Voltage (VCCIO) | — | 1.8 V / 3.3 V |
| Montageart | — | Surface Mount |
| Feuchtigkeitsempfindlichkeitsgrad (MSL) | — | 3 |
| Terminal Finish | — | Tin/Lead (Sn/Pb) |
| JESD-609 Code | — | e0 |
| Operating Temperature (industrial, I7) | — | -40C to +100C |