EP20K600CF672I7N vs EP20K600CF672I6 Vergleich
Detaillierter Direktvergleich von EP20K600CF672I7N von Intel und EP20K600CF672I6 von Altera. Vergleichen Sie die wichtigsten Spezifikationen, elektrischen Parameter, Gehäuse, Lebenszyklusstatus, Preise und Verfügbarkeit, um das beste Bauteil für Ihre Designanforderungen zu ermitteln.
Spezifikationsvergleich
| Parameter | EP20K600CF672I7N | EP20K600CF672I6 |
|---|---|---|
| Marke | Intel | Altera |
| Kategorie | FPGA & CPLD | FPGA & CPLD |
| Lebenszyklusstatus | Obsolete | Obsolete |
| Lagerstatus | In Stock | In Stock |
| Stückpreis (USD) | $232,00 | $142,00 |
| Family | APEX 20KC | APEX 20KC |
| Technology | 0.15 µm CMOS | — |
| Maximum System Gates | 600,000 | — |
| Logic Elements | 24,320 | 24,320 |
| Maximum User I/O Pins | 508 | 508 |
| Maximum Internal Frequency | 376 MHz | — |
| Embedded System Blocks (ESBs) | 160 | — |
| Total Embedded RAM (max) | 311,296 bits | — |
| Core Voltage (VCCINT) | 1.8 V | — |
| I/O Voltage (VCCIO) | 2.5 V / 3.3 V (MultiVolt, bank-dependent) | — |
| Gehäuse | 672-ball FineLine BGA (FC-FBGA) | 672-BGA FineLine BGA |
| Ball Pitch | 1.0 mm | — |
| Package Body Size | 27 mm × 27 mm | — |
| Speed Grade | I7 (-40 °C to +100 °C industrial) | CF |
| Propagation Delay (typical) | 1.6 ns | — |
| Configuration Method | JTAG (IEEE 1149.1) + EPC configuration device | SRAM (volatile) |
| Lead-Free Finish (N suffix) | Yes | — |
| RoHS-Status | [DATA_NEEDED: RoHS compliance] | [DATA_NEEDED: RoHS compliance status] |
| Device | — | EP20K600 |
| Typical Gates | — | 600,000 |
| Embedded Memory Bits | — | 311,296 |
| Number of PLLs | — | 4 |
| Temperature Grade | — | Industrial (I) |
| Betriebstemperatur | — | -40C to +85C |
| Process Technology | — | 0.18 micron CMOS |
| Montageart | — | Surface Mount (BGA) |