EP20K600CF672I8 vs EP20K600CF672C7N Vergleich

Detaillierter Direktvergleich von EP20K600CF672I8 von Altera und EP20K600CF672C7N von Altera. Vergleichen Sie die wichtigsten Spezifikationen, elektrischen Parameter, Gehäuse, Lebenszyklusstatus, Preise und Verfügbarkeit, um das beste Bauteil für Ihre Designanforderungen zu ermitteln.

Spezifikationsvergleich

Parameter EP20K600CF672I8 EP20K600CF672C7N
Marke Altera Altera
Kategorie FPGA & CPLD FPGA & CPLD
Lebenszyklusstatus Obsolete Obsolete
Lagerstatus In Stock In Stock
Stückpreis (USD) $195,00 $108,00
Family APEX 20KC —
Device Type SPLD / FPGA —
Logic Elements / Cells 24,320 24,320
Macros (Logic Cells) 2432 —
Typical Gate Count 600,000 gates —
Embedded Memory 311,296 bits —
User I/Os 488 to 508 —
Anzahl der Pins 652 (functional) / 672 (BGA balls) —
Propagation Delay (typical) 1.48 ns —
Internal Frequency (max) [DATA_NEEDED: max internal frequency in MHz] —
Core Supply Voltage 1.8 V —
Process Technology 0.15 µm all-layer copper 0.15 µm all-layer copper-metal CMOS
Betriebstemperatur 0 °C to +85 °C (Industrial) 0 °C to +85 °C (Commercial)
Package Type 672-ball BGA, 45 x 45 mm, 1.27 mm pitch —
Montageart Surface Mount Surface Mount (BGA)
RoHS-Status Compliant per legacy product records unknown
Configuration Interface JTAG / Passive Serial —
Design Tool Quartus II (legacy MAX+PLUS II) —
Device Family — APEX 20KC
Maximum System Gates — 1,052,000
Typical Gates — 600,000
Maximum User I/O Pins — 488
Total Package Pins — 652
Gehäuse — FC-FBGA (BGA-652) 45 x 45 mm, 1.27 mm pitch
Core Voltage — 1.8 V
Maximum Operating Frequency — 375.94 MHz
Propagation Delay — 1.48 ns
Architecture — MultiCore (LUT + Embedded System Memory)
Speed Grade — C7
Seated Height — 3.50 mm

Datenblätter & Ressourcen

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