EP20K600EBC652-2X vs EP20K600EFC144-2XN Vergleich

Detaillierter Direktvergleich von EP20K600EBC652-2X von Altera und EP20K600EFC144-2XN von Altera. Vergleichen Sie die wichtigsten Spezifikationen, elektrischen Parameter, Gehäuse, Lebenszyklusstatus, Preise und Verfügbarkeit, um das beste Bauteil für Ihre Designanforderungen zu ermitteln.

Spezifikationsvergleich

Parameter EP20K600EBC652-2X EP20K600EFC144-2XN
Marke Altera Altera
Kategorie FPGA & CPLD FPGA & CPLD
Lebenszyklusstatus Obsolete Obsolete
Lagerstatus In Stock In Stock
Stückpreis (USD) $275,00 $115,00
Device Family APEX 20KE —
Device Type SPLD / FPGA (Field Programmable Gate Array) —
Logic Elements (LEs) 24,320 —
Macros 24,320 —
Embedded Memory Bits 311,296 bits —
User I/Os 488 —
Gehäuse 652-ball BGA, 45 x 45 mm, 1.27 mm pitch 144-ball FineLine BGA
Total Pins / Balls 652 —
Propagation Delay 1.48 ns —
Betriebstemperatur 0 °C to +85 °C (commercial) -40C to +85C (industrial, 'N' suffix)
Process Technology 0.15 µm all-layer copper CMOS 0.18 um CMOS, 6-layer metal
Core Supply Voltage 2.5 V —
I/O Standard Support LVTTL, LVCMOS, PCI, SSTL, GTL+ —
Configuration Modes Passive serial, passive parallel, JTAG (IEEE 1149.1) —
Montageart Surface Mount —
RoHS-Status [DATA_NEEDED: RoHS status] [DATA_NEEDED: RoHS]
Family — APEX 20KE
Logic Elements — 24,576
Typical Gates — 600,000
Maximum System Gates — 1,053,840
Embedded RAM Bits — 311,040 bits (~38 KB)
Number of ESBs (Embedded System Blocks) — [DATA_NEEDED: ESB count]
Number of Multiplier Blocks — [DATA_NEEDED: multiplier count]
Number of PLLs — 4
Number of I/O Pins — [DATA_NEEDED: usable I/O count]
Core Voltage — 1.8 V
I/O Voltage Banks — Multi-voltage (LVTTL/LVCMOS/PCI)
Speed Grade — -2 (mid-tier)
Configuration Method — SRAM, IEEE 1532 / passive serial / passive parallel

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