EP20K600EBC652-3 vs EP2A15B652C9 Vergleich
Detaillierter Direktvergleich von EP20K600EBC652-3 von Intel und EP2A15B652C9 von Intel. Vergleichen Sie die wichtigsten Spezifikationen, elektrischen Parameter, Gehäuse, Lebenszyklusstatus, Preise und Verfügbarkeit, um das beste Bauteil für Ihre Designanforderungen zu ermitteln.
Spezifikationsvergleich
| Parameter | EP20K600EBC652-3 | EP2A15B652C9 |
|---|---|---|
| Marke | Intel | Intel |
| Kategorie | FPGA & CPLD | FPGA & CPLD |
| Lebenszyklusstatus | Obsolete | Obsolete |
| Lagerstatus | In Stock | In Stock |
| Stückpreis (USD) | $340,00 | $195,00 |
| Series | APEX-20KE | — |
| Family | APEX 20K | APEX II |
| Device Type | FPGA (Field Programmable Gate Array) / SPLD Loadable | — |
| Logic Elements | 24320 | 15,600 |
| Embedded Memory | 311296 bits | — |
| User I/Os | 488 | — |
| Number of Terminals | 652 | — |
| Package Type | BGA-652 (45 x 45 mm, 1.27 mm pitch) | — |
| Montageart | Surface Mount | Surface Mount (BGA) |
| Propagation Delay | 1.48 ns | — |
| Betriebstemperatur | 0 C to 85 C | 0 C to +85 C (commercial) |
| Speed Grade | -3 | -9 (fastest APEX II commercial) |
| Process Technology | 0.15-micron all-layer copper CMOS | — |
| Core Voltage | [DATA_NEEDED: core voltage] | 1.5 V |
| I/O Voltage Support | Multi-volt 3.3 V / 2.5 V / 1.8 V | — |
| Configuration Method | JTAG / serial / passive parallel | SRAM-based, JTAG 1149.1 boundary scan |
| PLLs | 4 | — |
| RoHS-Status | [DATA_NEEDED: RoHS status] | Compliant |
| Lead-Free | [DATA_NEEDED: lead-free] | Yes |
| Embedded System Blocks | — | 425 Kbits |
| Number of DLLs/PLLs | — | 4 PLUs |
| I/O Voltage Standards | — | 1.5 V, 1.8 V, 2.5 V, 3.3 V (LVTTL, LVCMOS, LVDS, SSTL, HSTL) |
| Gehäuse | — | 652-ball FineLine BGA |
| Programming File Format | — | .pof / .sof (Quartus) |
| MSL-Level | — | 3 (168 hours) |
| Lebenszyklusstatus | — | Obsolete - new design not recommended |