EP20K600EFC33-2X vs EP20K600EFC144-2XN Vergleich
Detaillierter Direktvergleich von EP20K600EFC33-2X von Altera und EP20K600EFC144-2XN von Altera. Vergleichen Sie die wichtigsten Spezifikationen, elektrischen Parameter, Gehäuse, Lebenszyklusstatus, Preise und Verfügbarkeit, um das beste Bauteil für Ihre Designanforderungen zu ermitteln.
Spezifikationsvergleich
| Parameter | EP20K600EFC33-2X | EP20K600EFC144-2XN |
|---|---|---|
| Marke | Altera | Altera |
| Kategorie | FPGA & CPLD | FPGA & CPLD |
| Lebenszyklusstatus | Obsolete | Obsolete |
| Lagerstatus | In Stock | In Stock |
| Stückpreis (USD) | $815,00 | $115,00 |
| Series | APEX-20KE | — |
| Family | APEX 20K (System-on-a-Programmable-Chip) | APEX 20KE |
| Logic Elements / Cells | 24320 | — |
| Total Gates | 600000 | — |
| Total RAM Bits | 311296 | — |
| Number of I/O | 588 | — |
| Core Supply Voltage | 1.71 V to 1.89 V (1.8 V nominal) | — |
| Process Technology | 0.15 um all-layer copper metal | 0.18 um CMOS, 6-layer metal |
| Maximum Internal Frequency | 200 MHz | — |
| Propagation Delay | 1.48 ns | — |
| Betriebstemperatur | 0C to +85C | -40C to +85C (industrial, 'N' suffix) |
| Gehäuse | 1020-ball FC-FBGA (33 mm x 33 mm) | 144-ball FineLine BGA |
| Ball Pitch | 1.27 mm | — |
| Montageart | Surface Mount | — |
| RoHS-Status | Non-compliant (legacy Altera product) | [DATA_NEEDED: RoHS] |
| Lead-Free Status | Contains lead (legacy) | — |
| Multi-Voltage I/O Support | 1.5V / 1.8V / 2.5V / 3.3V / 5.0V | — |
| Embedded System Blocks | Dual-port RAM / FIFO configurable | — |
| Logic Elements | — | 24,576 |
| Typical Gates | — | 600,000 |
| Maximum System Gates | — | 1,053,840 |
| Embedded RAM Bits | — | 311,040 bits (~38 KB) |
| Number of ESBs (Embedded System Blocks) | — | [DATA_NEEDED: ESB count] |
| Number of Multiplier Blocks | — | [DATA_NEEDED: multiplier count] |
| Number of PLLs | — | 4 |
| Number of I/O Pins | — | [DATA_NEEDED: usable I/O count] |
| Core Voltage | — | 1.8 V |
| I/O Voltage Banks | — | Multi-voltage (LVTTL/LVCMOS/PCI) |
| Speed Grade | — | -2 (mid-tier) |
| Configuration Method | — | SRAM, IEEE 1532 / passive serial / passive parallel |