EP20K60EFC324-2N vs EP20K60EFC324-3N Vergleich

Detaillierter Direktvergleich von EP20K60EFC324-2N von Altera und EP20K60EFC324-3N von Altera. Vergleichen Sie die wichtigsten Spezifikationen, elektrischen Parameter, Gehäuse, Lebenszyklusstatus, Preise und Verfügbarkeit, um das beste Bauteil für Ihre Designanforderungen zu ermitteln.

Spezifikationsvergleich

Parameter EP20K60EFC324-2N EP20K60EFC324-3N
Marke Altera Altera
Kategorie FPGA & CPLD FPGA & CPLD
Lebenszyklusstatus Obsolete Obsolete
Lagerstatus In Stock In Stock
Stückpreis (USD) $52,73 $35,40
Series APEX-20KE APEX-20KE
Family APEX 20K —
Number of Logic Elements/Cells 2,560 —
Total System Gates 60,000 —
Number of Logic Array Blocks (LABs/CLBs) 2,560 —
Total RAM Bits 32,768 [DATA_NEEDED: total RAM bits per APEX 20K datasheet]
Number of I/O 196 —
Core Voltage Supply 1.71 V to 1.89 V (1.8 V typ.) —
Internal Frequency (max) 200 MHz —
Propagation Delay 1.72 ns —
Operating Temperature Range (TJ) 0 °C to 85 °C (commercial) —
Gehäuse / Bauform 324-BGA (FineLine BGA, 19x19 mm) 324-BGA / 324-FBGA (19x19)
Supplier Device Package 324-FBGA (19x19) 324-FBGA (19x19)
Montageart Surface Mount Surface Mount
Process Technology 0.22 µm CMOS 0.22 um CMOS
Architecture MultiCore (LUT + ESB memory + product-term) —
Configuration Method Passive Serial / JTAG (IEEE 1149.1) —
RoHS-Status unknown [DATA_NEEDED: explicit RoHS statement]
Number of Logic Elements — 2560 Cells
Total Gates — 60K Gates (60000 typical)
Number of User I/Os — 196
Core Supply Voltage — 1.71V ~ 1.89V (1.8V nominal)
Betriebstemperatur — 0°C ~ 85°C (TJ)
Maximum Internal Frequency — 182 MHz (-3 speed grade)
Anzahl der Pins — 324
Embedded System Blocks — [DATA_NEEDED: ESB count]
I/O Standards Supported — [DATA_NEEDED: I/O standards list]
Packaging — Bulk (per distributor listing)
Ordering Suffix — -N suffix ordering variant

Datenblätter & Ressourcen

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