EP2A15B652C9 vs EP2A15F672C7AA Vergleich
Detaillierter Direktvergleich von EP2A15B652C9 von Intel und EP2A15F672C7AA von Intel. Vergleichen Sie die wichtigsten Spezifikationen, elektrischen Parameter, Gehäuse, Lebenszyklusstatus, Preise und Verfügbarkeit, um das beste Bauteil für Ihre Designanforderungen zu ermitteln.
Intel
EP2A15F672C7AA - APEX II FPGA 600K Gates 1.5V FC-FBGA672
EP2A15F672C7AA ⚠ Letzte BestellmöglichkeitSpezifikationsvergleich
| Parameter | EP2A15B652C9 | EP2A15F672C7AA |
|---|---|---|
| Marke | Intel | Intel |
| Kategorie | FPGA & CPLD | FPGA & CPLD |
| Lebenszyklusstatus | Obsolete | Letzte Kaufgelegenheit |
| Lagerstatus | In Stock | In Stock |
| Stückpreis (USD) | $195,00 | $215,00 |
| Family | APEX II | APEX II |
| Logic Elements | 15,600 | — |
| Embedded System Blocks | 425 Kbits | — |
| Number of DLLs/PLLs | 4 PLUs | — |
| Core Voltage | 1.5 V | 1.5 V |
| I/O Voltage Standards | 1.5 V, 1.8 V, 2.5 V, 3.3 V (LVTTL, LVCMOS, LVDS, SSTL, HSTL) | — |
| Speed Grade | -9 (fastest APEX II commercial) | — |
| Betriebstemperatur | 0 C to +85 C (commercial) | — |
| Gehäuse | 652-ball FineLine BGA | 672-ball FC-FBGA (flip-chip) |
| Configuration Method | SRAM-based, JTAG 1149.1 boundary scan | — |
| Programming File Format | .pof / .sof (Quartus) | — |
| Montageart | Surface Mount (BGA) | — |
| MSL-Level | 3 (168 hours) | — |
| RoHS-Status | Compliant | Compliant (per Full-Electronic listing) |
| Lead-Free | Yes | — |
| Lebenszyklusstatus | Obsolete - new design not recommended | — |
| Typical Gates | — | 600K |
| Maximum System Gates | — | 1.4M |
| Logic Elements (LEs) | — | 16,640 |
| Maximum User I/O | — | 492 |
| Operating Frequency (internal) | — | 500 MHz |
| LVDS Data Rate | — | 1 Gbps True-LVDS |
| I/O Standards Supported | — | LVTTL, LVCMOS, PCI, PCI-X, SSTL, HSTL, LVDS, LVPECL, PCML, HyperTransport |
| MultiVolt I/O Bank Voltages | — | 1.5V / 1.8V / 2.5V / 3.3V |
| Embedded Memory | — | Dual-port RAM blocks + CAM blocks |
| PLLs | — | 4 enhanced PLLs |
| Process Technology | — | 0.15 micrometer all-layer copper (up to 8 metal layers) |
| Programming Interfaces | — | Passive Serial, Fast Passive Parallel, JTAG (IEEE 1149.1) |
| Operating Temperature Grade | — | Commercial (0C to +85C) |
| Lifecycle | — | Last-Time-Buy / EOL announced Nov-Dec 2016 |