EP2A15F672C7 vs EP2A15F672C7AA Vergleich
Detaillierter Direktvergleich von EP2A15F672C7 von Intel und EP2A15F672C7AA von Intel. Vergleichen Sie die wichtigsten Spezifikationen, elektrischen Parameter, Gehäuse, Lebenszyklusstatus, Preise und Verfügbarkeit, um das beste Bauteil für Ihre Designanforderungen zu ermitteln.
Intel
EP2A15F672C7AA - APEX II FPGA 600K Gates 1.5V FC-FBGA672
EP2A15F672C7AA ⚠ Letzte BestellmöglichkeitSpezifikationsvergleich
| Parameter | EP2A15F672C7 | EP2A15F672C7AA |
|---|---|---|
| Marke | Intel | Intel |
| Kategorie | FPGA & CPLD | FPGA & CPLD |
| Lebenszyklusstatus | Obsolete | Letzte Kaufgelegenheit |
| Lagerstatus | In Stock | In Stock |
| Stückpreis (USD) | $98,00 | $215,00 |
| Series | APEX II (EP2A15) | — |
| Family | APEX II FPGA | APEX II |
| Logic Elements (LE) | 16,640 | — |
| Total System Gates | 425,984 | — |
| Maximum User I/O | 492 | 492 |
| Embedded Memory Bits | 425,984 | — |
| Number of Macrocells / Logic Units | 16,640 | — |
| Propagation Delay (tPD) | 1.69 ns | — |
| Core Voltage | 1.5 V | 1.5 V |
| Process Technology | 0.15 µm all-layer copper, up to 8 metal layers | 0.15 micrometer all-layer copper (up to 8 metal layers) |
| High-Speed I/O Standard | True-LVDS, LVPECL, PCML, HyperTransport | — |
| True-LVDS Data Rate | 1 Gbps | — |
| Gehäuse | 672-ball FineLine BGA (FCBGA) | 672-ball FC-FBGA (flip-chip) |
| Package Dimensions | 27 mm × 27 mm, 1.0 mm pitch | — |
| Montageart | Surface Mount | — |
| Betriebstemperatur | Commercial (0°C to +85°C) | — |
| Speed Grade | C7 | — |
| RoHS-Status | [DATA_NEEDED: RoHS status] | Compliant (per Full-Electronic listing) |
| Typical Gates | — | 600K |
| Maximum System Gates | — | 1.4M |
| Logic Elements (LEs) | — | 16,640 |
| Operating Frequency (internal) | — | 500 MHz |
| LVDS Data Rate | — | 1 Gbps True-LVDS |
| I/O Standards Supported | — | LVTTL, LVCMOS, PCI, PCI-X, SSTL, HSTL, LVDS, LVPECL, PCML, HyperTransport |
| MultiVolt I/O Bank Voltages | — | 1.5V / 1.8V / 2.5V / 3.3V |
| Embedded Memory | — | Dual-port RAM blocks + CAM blocks |
| PLLs | — | 4 enhanced PLLs |
| Programming Interfaces | — | Passive Serial, Fast Passive Parallel, JTAG (IEEE 1149.1) |
| Operating Temperature Grade | — | Commercial (0C to +85C) |
| Lifecycle | — | Last-Time-Buy / EOL announced Nov-Dec 2016 |