EP2A25B652C9 vs EP2A40B652C9 Vergleich

Detaillierter Direktvergleich von EP2A25B652C9 von Intel und EP2A40B652C9 von Intel. Vergleichen Sie die wichtigsten Spezifikationen, elektrischen Parameter, Gehäuse, Lebenszyklusstatus, Preise und Verfügbarkeit, um das beste Bauteil für Ihre Designanforderungen zu ermitteln.

Spezifikationsvergleich

Parameter EP2A25B652C9 EP2A40B652C9
Marke Intel Intel
Kategorie FPGA & CPLD FPGA & CPLD
Lebenszyklusstatus Obsolete Obsolete
Lagerstatus In Stock In Stock
Stückpreis (USD) $105,00 $92,40
Device Family APEX II (EP2A25) —
Logic Elements 24,320 40,160
Gehäuse 652-ball FineLine BGA 652-pin BGA
Speed Grade C9 (-7 commercial) —
Process Technology 0.18 µm CMOS 0.18 µm CMOS
Betriebstemperaturbereich [DATA_NEEDED: commercial/industrial temperature range] —
Core Voltage (VCCINT) 1.8 V —
I/O Voltage Standards LVTTL, LVCMOS, SSTL, LVDS —
Configuration Interface JTAG (IEEE 1149.1), passive serial, MAX configuration scheme —
Embedded Memory Embedded array blocks (EABs) —
Embedded Multipliers Yes (DSP blocks) —
Maximum User I/O [DATA_NEEDED: maximum usable I/O count for 652 BGA] —
RoHS-Status [DATA_NEEDED: RoHS compliance status] unknown
Lead-Free [DATA_NEEDED: lead-free status] —
Montageart Surface Mount (BGA) Surface Mount (BGA)
MSL-Level [DATA_NEEDED: moisture sensitivity level] 3 (168 hours floor life)
Family — APEX II
Maximum System Gates — 1.5 M (40K logic elements)
Embedded System Blocks — Yes (dual-port RAM, ROM, CAM)
Maximum User I/O Pins — [DATA_NEEDED: user I/O count]
Core Voltage — 1.5 V
Supply Voltage (I/O) — 3.3 V (multi-standard I/O supported)
Betriebstemperatur — -40C to +85C (industrial, C9 suffix)
Configuration Method — SRAM-based, serial/parallel, JTAG IEEE 1149.1
I/O Standards Supported — LVTTL, LVCMOS, PCI, GTL+, SSTL, LVDS
PLL Count — [DATA_NEEDED: PLL count]

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