EP2A25F672C7 vs EP2A25F672C7N Vergleich

Detaillierter Direktvergleich von EP2A25F672C7 von Altera und EP2A25F672C7N von Altera. Vergleichen Sie die wichtigsten Spezifikationen, elektrischen Parameter, Gehäuse, Lebenszyklusstatus, Preise und Verfügbarkeit, um das beste Bauteil für Ihre Designanforderungen zu ermitteln.

Spezifikationsvergleich

Parameter EP2A25F672C7 EP2A25F672C7N
Marke Altera Altera
Kategorie FPGA & CPLD FPGA & CPLD
Lebenszyklusstatus NRND Obsolete
Lagerstatus In Stock In Stock
Stückpreis (USD) $118,00 $195,00
Product Family APEX II —
Logic Elements 25,000 24,320 cells
Maximum System Gates 1,650,000 —
Maximum RAM Bits 422,976 —
User I/O Count 492 —
Gehäuse 672-ball FCBGA (FineLine BGA) —
Process Technology 0.15-um all-layer copper, up to 8 metal layers 0.15 µm all-layer copper (up to 8 metal layers)
Supply Voltage (Core) 1.5 V —
LVDS Data Rate 1 Gbps per channel (True-LVDS) —
I/O Standards Supported LVDS, LVPECL, PCML, HyperTransport —
Betriebstemperatur 0C to +85C (Commercial) 0 °C to 85 °C (commercial)
Speed Grade -7 —
Configuration Mode Passive Serial, Passive Parallel, JTAG —
RoHS-Status [DATA_NEEDED: RoHS status] [DATA_NEEDED: RoHS compliance]
Embedded System Blocks (ESB) Yes - RAM, ROM, CAM, multiplier support —
Family — APEX II
System Gates — Approximately 900,000
User I/Os — 492
Propagation Delay (tPD) — 1.69 ns
Internal Operating Frequency — Up to 500 MHz
Core Voltage (VCCINT) — 1.5 V
Logic Family — CMOS
Package Type — 672-ball FC-FBGA (FineLine BGA)
Package Body Size — 27 x 27 mm
Ball Pitch — 1.0 mm
High-Speed I/O Support — True-LVDS, LVPECL, PCML, HyperTransport up to 1 Gbps
Programmable Logic Type — Loadable PLD (in-system programmable)
Embedded Memory — Embedded System Blocks (ESB) configurable as dual-port RAM/ROM
PLLs — Up to 4
Montageart — Surface Mount

Datenblätter & Ressourcen

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