EP2A25F672C7 vs EP2A25F672C8 Vergleich
Detaillierter Direktvergleich von EP2A25F672C7 von Altera und EP2A25F672C8 von Altera. Vergleichen Sie die wichtigsten Spezifikationen, elektrischen Parameter, Gehäuse, Lebenszyklusstatus, Preise und Verfügbarkeit, um das beste Bauteil für Ihre Designanforderungen zu ermitteln.
Spezifikationsvergleich
| Parameter | EP2A25F672C7 | EP2A25F672C8 |
|---|---|---|
| Marke | Altera | Altera |
| Kategorie | FPGA & CPLD | FPGA & CPLD |
| Lebenszyklusstatus | NRND | Obsolete |
| Lagerstatus | In Stock | In Stock |
| Stückpreis (USD) | $118,00 | $951,18 |
| Product Family | APEX II | — |
| Logic Elements | 25,000 | 25,000 (typical gates) |
| Maximum System Gates | 1,650,000 | 40,960 |
| Maximum RAM Bits | 422,976 | — |
| User I/O Count | 492 | 492 |
| Gehäuse | 672-ball FCBGA (FineLine BGA) | 672-FBGA (FineLine BGA, 27x27 mm, 1.0 mm pitch) |
| Process Technology | 0.15-um all-layer copper, up to 8 metal layers | 0.15 microm CMOS, 8-layer copper interconnect |
| Supply Voltage (Core) | 1.5 V | — |
| LVDS Data Rate | 1 Gbps per channel (True-LVDS) | 1 Gbps |
| I/O Standards Supported | LVDS, LVPECL, PCML, HyperTransport | LVTTL, LVCMOS, PCI-X, GTL+, SSTL-2/3, HSTL, LVDS, LVPECL |
| Betriebstemperatur | 0C to +85C (Commercial) | 0 C to 85 C (commercial) |
| Speed Grade | -7 | C8 |
| Configuration Mode | Passive Serial, Passive Parallel, JTAG | — |
| RoHS-Status | [DATA_NEEDED: RoHS status] | Non-compliant (legacy product) |
| Embedded System Blocks (ESB) | Yes - RAM, ROM, CAM, multiplier support | — |
| Family | — | APEX II (EP2A25) |
| Macrocells / Embedded Logic | — | 2,432 macros |
| Propagation Delay (tpd) | — | 1.69 ns |
| PLL Count | — | 4 |
| Embedded Memory | — | ESB blocks (dual-port RAM, FIFO, CAM, ROM) |
| I/O Banks | — | 16 |
| Montageart | — | Surface Mount |