EP2A25F672C8 vs EP2A25F672ES Vergleich
Detaillierter Direktvergleich von EP2A25F672C8 von Altera und EP2A25F672ES von Altera. Vergleichen Sie die wichtigsten Spezifikationen, elektrischen Parameter, Gehäuse, Lebenszyklusstatus, Preise und Verfügbarkeit, um das beste Bauteil für Ihre Designanforderungen zu ermitteln.
Spezifikationsvergleich
| Parameter | EP2A25F672C8 | EP2A25F672ES |
|---|---|---|
| Marke | Altera | Altera |
| Kategorie | FPGA & CPLD | FPGA & CPLD |
| Lebenszyklusstatus | Obsolete | Obsolete |
| Lagerstatus | In Stock | In Stock |
| Stückpreis (USD) | $951,18 | $198,00 |
| Family | APEX II (EP2A25) | APEX II |
| Logic Elements | 25,000 (typical gates) | 24,320 |
| Maximum System Gates | 40,960 | — |
| Macrocells / Embedded Logic | 2,432 macros | — |
| User I/O Count | 492 | — |
| Gehäuse | 672-FBGA (FineLine BGA, 27x27 mm, 1.0 mm pitch) | 672-ball FC-FBGA |
| Propagation Delay (tpd) | 1.69 ns | — |
| Speed Grade | C8 | — |
| Betriebstemperatur | 0 C to 85 C (commercial) | — |
| Process Technology | 0.15 microm CMOS, 8-layer copper interconnect | 0.15 µm CMOS |
| I/O Standards Supported | LVTTL, LVCMOS, PCI-X, GTL+, SSTL-2/3, HSTL, LVDS, LVPECL | — |
| LVDS Data Rate | 1 Gbps | — |
| PLL Count | 4 | — |
| Embedded Memory | ESB blocks (dual-port RAM, FIFO, CAM, ROM) | — |
| I/O Banks | 16 | 16 |
| Montageart | Surface Mount | — |
| RoHS-Status | Non-compliant (legacy product) | Compliant |
| Maximum Gates | — | 900,000 |
| Embedded System Blocks (ESBs) | — | 24 |
| Maximum Embedded RAM | — | 1.4 Mbit |
| Maximum User I/O Pins | — | 492 |
| Core Voltage | — | 1.5 V |
| Maximum System Clock Frequency | — | 500 MHz |
| Number of PLLs | — | 4 |
| Supported I/O Standards | — | LVTTL, LVCMOS, PCI, LVDS, LVPECL, HSTL |
| Configuration Mode | — | Serial / Parallel / JTAG |
| Betriebstemperaturbereich | — | [DATA_NEEDED: operating temperature range] |