EP2A25F672I-7 vs EP2A25F672I6 Vergleich
Detaillierter Direktvergleich von EP2A25F672I-7 von Intel und EP2A25F672I6 von Intel. Vergleichen Sie die wichtigsten Spezifikationen, elektrischen Parameter, Gehäuse, Lebenszyklusstatus, Preise und Verfügbarkeit, um das beste Bauteil für Ihre Designanforderungen zu ermitteln.
Spezifikationsvergleich
| Parameter | EP2A25F672I-7 | EP2A25F672I6 |
|---|---|---|
| Marke | Intel | Intel |
| Kategorie | FPGA & CPLD | FPGA & CPLD |
| Lebenszyklusstatus | Obsolete | NRND |
| Lagerstatus | In Stock | In Stock |
| Stückpreis (USD) | $171,00 | $178,00 |
| Family | APEX II | APEX II |
| Manufacturer | Intel (formerly Altera) | — |
| Device Type | FPGA (Field-Programmable Gate Array) | — |
| System Gates | 900K (approximately) | — |
| Logic Cells / Elements | 24,320 | — |
| Maximum Operating Frequency | 500 MHz | — |
| Process Technology | 0.15 um | 0.18 µm CMOS |
| Core Voltage | 1.5 V | 1.5 V |
| Gehäuse | 672-pin FC-FBGA | 672-ball FineLine BGA (FBGA-672) |
| Montageart | Surface Mount (Flip-Chip BGA) | Surface Mount (BGA) |
| Speed Grade | -7 | 6 |
| Betriebstemperatur | -40C to +85C (Industrial) | — |
| Temperature Grade | Industrial (I) | Industrial (-40 °C to +100 °C ambient) |
| Configuration Method | JTAG, Passive Serial, Active Serial | External SRAM configuration device (EPC series) |
| JTAG Support | IEEE 1149.1 Boundary Scan | — |
| RoHS-Status | [DATA_NEEDED: rohs status] | [DATA_NEEDED: RoHS compliance status] |
| MSL-Level | [DATA_NEEDED: MSL level] | [DATA_NEEDED: moisture sensitivity level] |
| Embedded Memory | ESBs (Embedded System Blocks) | Embedded System Blocks (ESB), dual-port RAM / CAM |
| Logic Elements (typical gates) | — | 25,000 |
| Fabric Architecture | — | SRAM-based LUT |
| DSP Blocks | — | MultiCore dedicated multipliers |
| Boundary Scan | — | JTAG (IEEE 1149.1) compliant |
| Clock Management | — | Dedicated PLL / clock tree circuitry |
| I/O Bank Count | — | [DATA_NEEDED: number of user I/O banks] |
| Lead-Free | — | [DATA_NEEDED: lead-free status] |