EP2A40B724CP vs EP2A40B724C7 Vergleich

Detaillierter Direktvergleich von EP2A40B724CP von Altera und EP2A40B724C7 von Intel. Vergleichen Sie die wichtigsten Spezifikationen, elektrischen Parameter, Gehäuse, Lebenszyklusstatus, Preise und Verfügbarkeit, um das beste Bauteil für Ihre Designanforderungen zu ermitteln.

Spezifikationsvergleich

Parameter EP2A40B724CP EP2A40B724C7
Marke Altera Intel
Kategorie FPGA & CPLD FPGA & CPLD
Lebenszyklusstatus Obsolete Obsolete
Lagerstatus In Stock In Stock
Stückpreis (USD) $71,00 $650,00
Family APEX II APEX II
Logic Elements 40,000 —
Embedded Memory Bits 655,360 bits —
LAB/IO Rows 540 —
Effective Logic Capacity 38400 LE —
Device Type FPGA (SRAM-based) —
Core Voltage 1.5 V —
Gehäuse 724-ball FineLine BGA (FBGA) 724-ball FCBGA (FineLine BGA), 35 mm x 35 mm
I/O Standards LVTTL, LVCMOS, LVDS, PCI, HSTL, LVPECL —
Configuration SRAM-based, JTAG, in-system programmable —
PLL Count [DATA_NEEDED: PLL count] —
Embedded Multipliers [DATA_NEEDED: multiplier count] —
Betriebstemperatur 0C to +85C (commercial) 0 °C to +85 °C (commercial)
RoHS-Status [DATA_NEEDED: RoHS status] Non-compliant (lead-bearing FCBGA)
Montageart Surface Mount (BGA) Surface Mount (BGA)
MSL-Level [DATA_NEEDED: MSL level] [DATA_NEEDED: MSL level]
Logic Elements / Cells — 38,400
Total System Gates — 1,500,000
Embedded RAM Bits — 655,360
Maximum User I/O — 540
Core Supply Voltage — 1.425 V to 1.575 V (typ. 1.5 V)
Process Technology — 0.15 µm CMOS, up to 8 metal layers, all-layer copper
Maximum Internal Frequency — 562 MHz
PLLs — 4
I/O Standards Supported — LVTTL, LVCMOS, 1.5 V/1.8 V/2.5 V/3.3 V, SSTL, HSTL, PCI, LVDS, LVPECL, PCML, HyperTransport, True-LVDS (1 Gbps)
Configuration Method — JTAG (IEEE 1149.1), Passive Serial, Passive Parallel, Active Serial via EPC configuration devices
MultiVolt I/O Support — 1.5 V, 1.8 V, 2.5 V, 3.3 V
DDR Memory Support — Yes (via ESB / I/O circuitry)

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