EP2A40F1508 vs EP2A40B724C7 Vergleich

Detaillierter Direktvergleich von EP2A40F1508 von Altera und EP2A40B724C7 von Intel. Vergleichen Sie die wichtigsten Spezifikationen, elektrischen Parameter, Gehäuse, Lebenszyklusstatus, Preise und Verfügbarkeit, um das beste Bauteil für Ihre Designanforderungen zu ermitteln.

Spezifikationsvergleich

Parameter EP2A40F1508 EP2A40B724C7
Marke Altera Intel
Kategorie FPGA & CPLD FPGA & CPLD
Lebenszyklusstatus Obsolete Obsolete
Lagerstatus In Stock In Stock
Stückpreis (USD) $185,00 $650,00
Family APEX II APEX II
Manufacturer Altera (now Intel PSG) —
Logic Elements (LEs) 40,000 typical —
Maximum System Gates 1,500,000 —
Embedded System Memory (ESB) 1,500 Kbits —
Embedded Multiplier Blocks 12 (9x9-bit signed) —
Phase-Locked Loops (PLLs) 4 —
Maximum User I/O Pins 824 —
Core Voltage 1.5 V —
I/O Voltage 1.5V, 1.8V, 2.5V, 3.3V compatible —
Process Technology 0.18 µm CMOS SRAM 0.15 µm CMOS, up to 8 metal layers, all-layer copper
Gehäuse 1508-ball FineLine BGA (FBGA-1508) 724-ball FCBGA (FineLine BGA), 35 mm x 35 mm
Montageart Surface Mount (BGA) Surface Mount (BGA)
Betriebstemperatur [DATA_NEEDED: temperature grade] 0 °C to +85 °C (commercial)
RoHS-Status Compliant Non-compliant (lead-bearing FCBGA)
Lead-Free Yes —
Logic Elements / Cells — 38,400
Total System Gates — 1,500,000
Embedded RAM Bits — 655,360
Maximum User I/O — 540
Core Supply Voltage — 1.425 V to 1.575 V (typ. 1.5 V)
Maximum Internal Frequency — 562 MHz
PLLs — 4
I/O Standards Supported — LVTTL, LVCMOS, 1.5 V/1.8 V/2.5 V/3.3 V, SSTL, HSTL, PCI, LVDS, LVPECL, PCML, HyperTransport, True-LVDS (1 Gbps)
Configuration Method — JTAG (IEEE 1149.1), Passive Serial, Passive Parallel, Active Serial via EPC configuration devices
MultiVolt I/O Support — 1.5 V, 1.8 V, 2.5 V, 3.3 V
DDR Memory Support — Yes (via ESB / I/O circuitry)
MSL-Level — [DATA_NEEDED: MSL level]

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