EP2A40F33C-7 vs EP2A25F672C7 Vergleich
Detaillierter Direktvergleich von EP2A40F33C-7 von Altera und EP2A25F672C7 von Altera. Vergleichen Sie die wichtigsten Spezifikationen, elektrischen Parameter, Gehäuse, Lebenszyklusstatus, Preise und Verfügbarkeit, um das beste Bauteil für Ihre Designanforderungen zu ermitteln.
Spezifikationsvergleich
| Parameter | EP2A40F33C-7 | EP2A25F672C7 |
|---|---|---|
| Marke | Altera | Altera |
| Kategorie | FPGA & CPLD | FPGA & CPLD |
| Lebenszyklusstatus | Obsolete | NRND |
| Lagerstatus | In Stock | In Stock |
| Stückpreis (USD) | $112,00 | $118,00 |
| Family | APEX II | — |
| Logic Elements | 40,960 LEs | 25,000 |
| Typical Gates | 1,500,000 system gates | — |
| Embedded Memory | 342 Kbits dual-port RAM | — |
| Speed Grade | -7 | -7 |
| Gehäuse | 33 mm FineLine BGA (F33) | 672-ball FCBGA (FineLine BGA) |
| Maximum User I/O | [DATA_NEEDED: user I/O count] | — |
| Core Voltage | 1.5 V | — |
| I/O Voltage Support | 1.5 V / 1.8 V / 2.5 V / 3.3 V (multi-bank) | — |
| Process Technology | 0.15 µm CMOS | 0.15-um all-layer copper, up to 8 metal layers |
| PLLs | Up to 4 | — |
| Betriebstemperatur | Commercial (0 °C to +85 °C) | 0C to +85C (Commercial) |
| Moisture Sensitivity Level | MSL 3 | — |
| Peak Reflow Temperature | 220 °C | — |
| Design Software | Quartus II (legacy) | — |
| Configuration Method | Passive serial / parallel / JTAG | — |
| Product Family | — | APEX II |
| Maximum System Gates | — | 1,650,000 |
| Maximum RAM Bits | — | 422,976 |
| User I/O Count | — | 492 |
| Supply Voltage (Core) | — | 1.5 V |
| LVDS Data Rate | — | 1 Gbps per channel (True-LVDS) |
| I/O Standards Supported | — | LVDS, LVPECL, PCML, HyperTransport |
| Configuration Mode | — | Passive Serial, Passive Parallel, JTAG |
| RoHS-Status | — | [DATA_NEEDED: RoHS status] |
| Embedded System Blocks (ESB) | — | Yes - RAM, ROM, CAM, multiplier support |