EP2A40F672C6 vs EP2A40F672C7N Vergleich
Detaillierter Direktvergleich von EP2A40F672C6 von Altera und EP2A40F672C7N von Intel. Vergleichen Sie die wichtigsten Spezifikationen, elektrischen Parameter, Gehäuse, Lebenszyklusstatus, Preise und Verfügbarkeit, um das beste Bauteil für Ihre Designanforderungen zu ermitteln.
Spezifikationsvergleich
| Parameter | EP2A40F672C6 | EP2A40F672C7N |
|---|---|---|
| Marke | Altera | Intel |
| Kategorie | FPGA & CPLD | FPGA & CPLD |
| Lebenszyklusstatus | Obsolete | NRND |
| Lagerstatus | In Stock | In Stock |
| Stückpreis (USD) | $105,00 | $198,00 |
| Family | APEX II | APEX II |
| Device | EP2A40 | — |
| Logic Elements (typical) | 40,000 | — |
| Maximum System Gates | [DATA_NEEDED: maximum system gates] | — |
| Embedded System Blocks (ESBs) | [DATA_NEEDED: ESB count] | — |
| Maximum User I/O Pins | [DATA_NEEDED: max user I/O count] | — |
| Gehäuse | 672-ball FineLine BGA (FBGA-672) | 672-ball FC-FBGA (FineLine BGA), S-PBGA-B672, 27 x 27 mm, 1.0 mm pitch |
| Speed Grade | C6 (commercial) | 7 |
| Betriebstemperatur | Commercial (0C to +85C) | 0 °C to 85 °C (commercial, 'C' grade) |
| Process Technology | 0.18-micron CMOS | 0.15 µm CMOS, all-layer copper, up to 8 metal layers |
| Configuration Memory | SRAM-based | — |
| JTAG Support | Yes (IEEE 1149.1) | — |
| PLL Support | Yes | — |
| Montageart | Surface Mount (BGA) | Surface Mount |
| RoHS-Status | [DATA_NEEDED: RoHS status] | — |
| Lead-Free | [DATA_NEEDED: lead-free status] | — |
| Lifecycle | Obsolete / EOL (per Intel/Altera product discontinuation notice) | — |
| Logic Elements / Cells | — | 38,400 |
| System Gates | — | 1.5 M |
| Maximum User I/Os | — | 492 |
| Propagation Delay (tpd) | — | 1.55 ns |
| Internal Performance | — | 562 MHz |
| Core Voltage | — | 1.5 V |
| MultiVolt I/O Support | — | 1.5 V / 1.8 V / 2.5 V / 3.3 V / 5.0 V |
| Logic Family | — | CMOS |
| Lead-Free / RoHS | — | Yes (N suffix) |
| Configuration Modes | — | Passive Serial, Passive Parallel, JTAG |