EP2A40F672C8N vs EP2A40F672C7ES Vergleich
Detaillierter Direktvergleich von EP2A40F672C8N von Intel und EP2A40F672C7ES von Intel. Vergleichen Sie die wichtigsten Spezifikationen, elektrischen Parameter, Gehäuse, Lebenszyklusstatus, Preise und Verfügbarkeit, um das beste Bauteil für Ihre Designanforderungen zu ermitteln.
Spezifikationsvergleich
| Parameter | EP2A40F672C8N | EP2A40F672C7ES |
|---|---|---|
| Marke | Intel | Intel |
| Kategorie | FPGA & CPLD | FPGA & CPLD |
| Lebenszyklusstatus | Obsolete | Obsolete |
| Lagerstatus | In Stock | In Stock |
| Stückpreis (USD) | $122,00 | $124,75 |
| Family | APEX II | APEX II |
| Series | EP2A40 | — |
| Logic Family | CMOS | — |
| System Gates | 1.5 M | — |
| Logic Elements / Cells | 38,400 | — |
| Maximum Operating Frequency | 376 MHz | 562 MHz |
| Propagation Delay | 1.55 ns | — |
| Technology Node | 0.15 µm | — |
| Process Feature | All-layer copper, up to 8 metal layers | — |
| Nominal Supply Voltage (VCCINT) | 1.5 V | — |
| Supply Voltage Range | 1.425 V to 1.575 V | — |
| User I/Os | 492 | — |
| Number of Pins / Balls | 672 | — |
| Package Type | FC-FBGA (FineLine BGA) | — |
| Package Dimensions | 27 x 27 mm | 27 × 27 mm |
| Ball Pitch | 1.0 mm | 1.0 mm |
| LVDS Data Rate | 1 Gbps | — |
| Embedded PLLs | 4 | — |
| Programming Interface | JTAG (IEEE 1149.1) | — |
| Operating Temperature (Commercial) | 0 °C to 85 °C | — |
| Speed Grade | C8 | 7 |
| RoHS-Status | [DATA_NEEDED: RoHS status] | [DATA_NEEDED: rohs status] |
| Logic Elements | — | 38400 |
| Typical Gates | — | 1.5 M |
| Maximum Logic Elements | — | 40960 |
| Maximum Macro Cells | — | 2560 |
| Maximum User I/O | — | 492 |
| Process Technology | — | 0.15 µm CMOS |
| Core Voltage (VCCINT) | — | 1.5 V |
| I/O Voltage (VCCIO) | — | 3.3 V |
| Gehäuse | — | 672-pin FC-FBGA (FineLine BGA) |
| Betriebstemperatur | — | 0 °C to +85 °C (commercial) |
| Status Code | — | ES (Engineering Sample) |
| Montageart | — | Surface Mount |