EP2A40F672C9ES vs EP2A40F672C7N Vergleich
Detaillierter Direktvergleich von EP2A40F672C9ES von Altera und EP2A40F672C7N von Intel. Vergleichen Sie die wichtigsten Spezifikationen, elektrischen Parameter, Gehäuse, Lebenszyklusstatus, Preise und Verfügbarkeit, um das beste Bauteil für Ihre Designanforderungen zu ermitteln.
Spezifikationsvergleich
| Parameter | EP2A40F672C9ES | EP2A40F672C7N |
|---|---|---|
| Marke | Altera | Intel |
| Kategorie | FPGA & CPLD | FPGA & CPLD |
| Lebenszyklusstatus | NRND | NRND |
| Lagerstatus | In Stock | In Stock |
| Stückpreis (USD) | $195,00 | $198,00 |
| Family | APEX II | APEX II |
| Logic Elements | 38,400 | — |
| System Gates | 1,500,000 | 1.5 M |
| Maximum User I/O | 492 | — |
| Operating Frequency (max) | 366 MHz | — |
| Process Technology | 0.15 µm CMOS | 0.15 µm CMOS, all-layer copper, up to 8 metal layers |
| Core Voltage | 1.5 V | 1.5 V |
| Gehäuse | 672-pin FC-FBGA | 672-ball FC-FBGA (FineLine BGA), S-PBGA-B672, 27 x 27 mm, 1.0 mm pitch |
| Montageart | Surface Mount (BGA) | Surface Mount |
| Speed Grade | -9 | 7 |
| Configuration Modes | PS, PPS, PPA, JTAG, FPP | Passive Serial, Passive Parallel, JTAG |
| Embedded Memory (ESB) | Yes (RAM/ROM/CAM) | — |
| I/O Standards | LVTTL, LVCMOS, PCI, SSTL, HSTL, GTL+ | — |
| Boundary Scan | IEEE 1149.1 (JTAG) | — |
| RoHS-Status | unknown | — |
| Logic Elements / Cells | — | 38,400 |
| Maximum User I/Os | — | 492 |
| Propagation Delay (tpd) | — | 1.55 ns |
| Internal Performance | — | 562 MHz |
| MultiVolt I/O Support | — | 1.5 V / 1.8 V / 2.5 V / 3.3 V / 5.0 V |
| Logic Family | — | CMOS |
| Betriebstemperatur | — | 0 °C to 85 °C (commercial, 'C' grade) |
| Lead-Free / RoHS | — | Yes (N suffix) |