EP2A40F672I7 vs EP2A40F672I9 Vergleich
Detaillierter Direktvergleich von EP2A40F672I7 von Altera und EP2A40F672I9 von Intel. Vergleichen Sie die wichtigsten Spezifikationen, elektrischen Parameter, Gehäuse, Lebenszyklusstatus, Preise und Verfügbarkeit, um das beste Bauteil für Ihre Designanforderungen zu ermitteln.
Spezifikationsvergleich
| Parameter | EP2A40F672I7 | EP2A40F672I9 |
|---|---|---|
| Marke | Altera | Intel |
| Kategorie | FPGA & CPLD | FPGA & CPLD |
| Lebenszyklusstatus | Obsolete | Obsolete |
| Lagerstatus | In Stock | In Stock |
| Stückpreis (USD) | $185,00 | $165,00 |
| Family | APEX II | APEX II |
| Logic Elements | 38,400 | — |
| Maximum System Gates | 1,500,000 | — |
| Maximum User I/O | [DATA_NEEDED: max user I/O pins for F672 package] | — |
| Core Voltage (VCCINT) | 1.5 V | — |
| I/O Voltage (VCCIO) | [DATA_NEEDED: VCCIO supported levels] | — |
| Process Technology | 0.15 µm CMOS | 0.15 µm CMOS |
| Core Frequency (max) | 562 MHz | — |
| Betriebstemperatur | -40 °C to +85 °C (Industrial) | — |
| Gehäuse | 672-ball FC-FBGA | 672-pin FC-FBGA |
| Package Family | Fine-pitch Chip-scale BGA | — |
| Montageart | Surface Mount | Surface Mount (BGA) |
| Speed Grade | -7 (speed grade 7) | — |
| Feuchtigkeitsempfindlichkeitsgrad (MSL) | 3 | — |
| Peak Reflow Temperature | 220 °C | — |
| Configuration Method | JTAG / Passive Serial / Active Serial | — |
| RoHS-Status | unknown | [DATA_NEEDED: RoHS status] |
| Logic Elements / Cells | — | 38,400 cells |
| System Gates | — | 1.5 M |
| Maximum Internal Frequency | — | 366 MHz |
| Core Supply Voltage | — | 1.5 V |
| Operating Temperature Grade | — | Industrial (I) |
| Programming Interface | — | IEEE 1149.1 JTAG |
| Configuration Memory | — | SRAM-based, in-system programmable |
| Design Tool Support | — | Quartus / MAX+PLUS II |
| Lead-Free | — | [DATA_NEEDED: lead-free status] |
| Device Marking Suffix Decode | — | I = Industrial grade; 9 = speed grade 9 |