EP2A40F672I8N vs EP2A40F672I7 Vergleich
Detaillierter Direktvergleich von EP2A40F672I8N von Altera und EP2A40F672I7 von Altera. Vergleichen Sie die wichtigsten Spezifikationen, elektrischen Parameter, Gehäuse, Lebenszyklusstatus, Preise und Verfügbarkeit, um das beste Bauteil für Ihre Designanforderungen zu ermitteln.
Spezifikationsvergleich
| Parameter | EP2A40F672I8N | EP2A40F672I7 |
|---|---|---|
| Marke | Altera | Altera |
| Kategorie | FPGA & CPLD | FPGA & CPLD |
| Lebenszyklusstatus | Obsolete | Obsolete |
| Lagerstatus | In Stock | In Stock |
| Stückpreis (USD) | $1.145,00 | $185,00 |
| Family | APEX II | APEX II |
| Series | EP2A40 | — |
| System Gates | 1,500,000 | — |
| Logic Cells (Elements) | 38,400 | — |
| Maximum Operating Frequency | 376 MHz | — |
| Process Technology | 0.15 micrometer | 0.15 µm CMOS |
| Core Voltage | 1.5 V | — |
| I/O Voltage (VCCIO) | 3.3 V / 2.5 V / 1.8 V (bank-dependent) | [DATA_NEEDED: VCCIO supported levels] |
| Gehäuse | 672-pin FC-FBGA | 672-ball FC-FBGA |
| Pin-Anzahl | 672 | — |
| Montageart | Surface Mount (BGA) | Surface Mount |
| Operating Temperature Grade | Industrial (-40C to +85C), I-suffix | — |
| Speed Grade | 8 | -7 (speed grade 7) |
| RoHS-Status | Compliant | unknown |
| Device Type | FPGA (Loadable PLD) | — |
| Logic Elements | — | 38,400 |
| Maximum System Gates | — | 1,500,000 |
| Maximum User I/O | — | [DATA_NEEDED: max user I/O pins for F672 package] |
| Core Voltage (VCCINT) | — | 1.5 V |
| Core Frequency (max) | — | 562 MHz |
| Betriebstemperatur | — | -40 °C to +85 °C (Industrial) |
| Package Family | — | Fine-pitch Chip-scale BGA |
| Feuchtigkeitsempfindlichkeitsgrad (MSL) | — | 3 |
| Peak Reflow Temperature | — | 220 °C |
| Configuration Method | — | JTAG / Passive Serial / Active Serial |