EP2A70B652C7 vs EP2A40B652C7 Vergleich
Detaillierter Direktvergleich von EP2A70B652C7 von Intel und EP2A40B652C7 von Intel. Vergleichen Sie die wichtigsten Spezifikationen, elektrischen Parameter, Gehäuse, Lebenszyklusstatus, Preise und Verfügbarkeit, um das beste Bauteil für Ihre Designanforderungen zu ermitteln.
Intel
EP2A40B652C7 - Altera APEX II 40k LE FPGA, BGA-652 | Intel PSG
EP2A40B652C7 ⚠ Letzte BestellmöglichkeitSpezifikationsvergleich
| Parameter | EP2A70B652C7 | EP2A40B652C7 |
|---|---|---|
| Marke | Intel | Intel |
| Kategorie | FPGA & CPLD | FPGA & CPLD |
| Lebenszyklusstatus | Obsolete | Letzte Kaufgelegenheit |
| Lagerstatus | In Stock | In Stock |
| Stückpreis (USD) | $10,51 | $0,00 |
| Manufacturer | Intel (formerly Altera) | — |
| Series | APEX II | — |
| Family | APEX II (Field-Programmable Gate Array) | — |
| Logic Elements (LEs) | 67200 | — |
| Typical Gates | 1140000 | — |
| Maximum User I/Os | 336 | — |
| Package Type | BGA-652 (FineLine BGA) | — |
| Package Size | 27 mm x 27 mm (approximate) | — |
| Montageart | Surface Mount | Surface Mount (BGA) |
| Operating Temperature Grade | Commercial (C) | Commercial (C suffix) |
| Speed Grade | 7 | 7 |
| Core Voltage | 1.8 V | — |
| I/O Bank Voltage (VCCIO) | 1.5V / 1.8V / 2.5V / 3.3V (bank-dependent) | — |
| Configuration Interface | JTAG, Passive Serial | — |
| Speichertyp | Embedded SRAM blocks (ESBs) | — |
| PLL / Clock Management | Yes, dedicated PLL blocks | — |
| RoHS-Status | [DATA_NEEDED: RoHS compliance status] | Unknown |
| Lead-Free | [DATA_NEEDED: lead-free status] | — |
| Device Family | — | APEX II |
| Logic Elements | — | 40,000 LEs |
| Maximum User I/O Pins | — | 538 (per package, [DATA_NEEDED: exact count for BGA-652]) |
| Gehäuse | — | 652-ball FineLine BGA |
| Embedded Memory | — | [DATA_NEEDED: ESB RAM bits for EP2A40] |
| Number of PLLs | — | [DATA_NEEDED: PLL count for EP2A40] |
| I/O Standards Supported | — | LVTTL, LVCMOS, PCI, GTL+, SSTL, LVDS, LVPECL |
| Supply Voltage (Core) | — | 1.8 V nominal [DATA_NEEDED: exact tolerance] |
| Supply Voltage (I/O) | — | Multi-voltage I/O [DATA_NEEDED: VCCIO range] |
| Process Technology | — | [DATA_NEEDED: process node] |
| Configuration Method | — | SRAM-based, supported via EPC configuration devices |
| MSL-Level | — | [DATA_NEEDED: MSL rating] |