EP2A70B724C7N vs EP2A70B724C7ES Vergleich
Detaillierter Direktvergleich von EP2A70B724C7N von Altera und EP2A70B724C7ES von Altera. Vergleichen Sie die wichtigsten Spezifikationen, elektrischen Parameter, Gehäuse, Lebenszyklusstatus, Preise und Verfügbarkeit, um das beste Bauteil für Ihre Designanforderungen zu ermitteln.
Spezifikationsvergleich
| Parameter | EP2A70B724C7N | EP2A70B724C7ES |
|---|---|---|
| Marke | Altera | Altera |
| Kategorie | FPGA & CPLD | FPGA & CPLD |
| Lebenszyklusstatus | Obsolete | NRND |
| Lagerstatus | In Stock | In Stock |
| Stückpreis (USD) | $188,00 | $2.190,00 |
| Family | APEX II (EP2A70) | APEX II |
| Device Type | FPGA (Field Programmable Gate Array) | — |
| Technology | 0.15 µm CMOS | — |
| System Gates | 3,000,000 | — |
| Logic Cells / Logic Elements | 67,200 | — |
| Maximum Internal Frequency | 420 MHz | — |
| Propagation Delay (typ.) | 2.17 ns | — |
| User I/O Pins | 536 | 540 |
| Macrocells (memory blocks reference) | 16 | — |
| Core Supply Voltage | 1.5 V nominal | — |
| I/O Supply Voltage | MultiVolt (1.5V / 1.8V / 2.5V / 3.3V / 5V tolerant) | — |
| Betriebstemperatur | 0 °C to +85 °C (Commercial) | — |
| Gehäuse | 724-pin FCBGA (Flip-Chip BGA) | 724-pin FCBGA |
| Ball Pitch | 1.27 mm | — |
| Seated Height | 3.5 mm | — |
| Montageart | Surface Mount | Surface Mount (BGA) |
| Configuration Method | JTAG, Passive Serial (PS), Fast Passive Parallel (FPP) | — |
| PLL Count | [DATA_NEEDED: PLL count] | — |
| Embedded Memory | Embedded System Blocks (ESBs) - dual-port RAM / ROM / CAM | — |
| RoHS-Status | [DATA_NEEDED: RoHS status] | [DATA_NEEDED: RoHS status] |
| Typical Gates | — | 3,000,000 (3M) |
| Logic Elements (Cells) | — | 67,200 |
| Maximum Operating Frequency | — | 420 MHz |
| Process Technology | — | 0.15 µm |
| Core Voltage | — | 1.5 V |
| Speed Grade | — | C7 |
| Temperature Grade | — | Commercial (C) |
| Speichertyp | — | Embedded System Block (ESB) |
| PLLs | — | Up to 8 |
| MSL-Level | — | [DATA_NEEDED: MSL level] |
| Programming Interface | — | JTAG / ByteBlaster |
| Device Marking Suffix | — | ES (Engineering Sample) |