EP2A70B724I8 vs EP2A70B724C8N Vergleich
Detaillierter Direktvergleich von EP2A70B724I8 von Intel und EP2A70B724C8N von Altera. Vergleichen Sie die wichtigsten Spezifikationen, elektrischen Parameter, Gehäuse, Lebenszyklusstatus, Preise und Verfügbarkeit, um das beste Bauteil für Ihre Designanforderungen zu ermitteln.
Altera
EP2A70B724C8N - APEX II FPGA, 3M Gates, 724-FCBGA | Altera / Intel
EP2A70B724C8N ⚠ Letzte BestellmöglichkeitSpezifikationsvergleich
| Parameter | EP2A70B724I8 | EP2A70B724C8N |
|---|---|---|
| Marke | Intel | Altera |
| Kategorie | FPGA & CPLD | FPGA & CPLD |
| Lebenszyklusstatus | Obsolete | Letzte Kaufgelegenheit |
| Lagerstatus | In Stock | In Stock |
| Stückpreis (USD) | $210,00 | $240,00 |
| Family | APEX II | FPGA (PLD) |
| Logic Elements (LEs) | 67200 | — |
| System Gates | 3 M (typical maximum) | 3,000,000 (3 M) |
| Process Technology | 0.15 µm CMOS | 0.15 um CMOS, SRAM-based |
| Core Voltage | 1.5 V | — |
| Maximum Internal Frequency | 281 MHz (typical) | — |
| Gehäuse | 724-pin FCBGA | — |
| Pin-Anzahl | 724 | — |
| Operating Temperature (Industrial) | -40 °C to +100 °C | — |
| Speed Grade | 8 | — |
| Embedded Memory | ESB / TriMatrix (size not in provided data) | — |
| Configuration Modes | Active Serial, Passive Serial, Passive Parallel Asynchronous | — |
| PLL Count | [DATA_NEEDED: PLL block count] | — |
| User I/O Banks | [DATA_NEEDED: bank count and I/O count] | — |
| Multipliers | Embedded multiplier blocks (count [DATA_NEEDED]) | — |
| Supported I/O Standards | LVTTL, LVCMOS, SSTL, LVDS (True-LVDS), PCI, HSTL | — |
| Montageart | Surface Mount (BGA) | Surface Mount (BGA) |
| RoHS-Status | [DATA_NEEDED: RoHS compliance] | — |
| Configuration Device Compatibility | EPC4, EPC8, EPC16 (Enhanced Configuration Devices) | — |
| Design Software | Quartus II (legacy support) | — |
| Series | — | APEX II (EP2A70) |
| Logic Elements / Cells | — | 67,200 |
| Macrocells | — | 16 |
| Product Terms | — | 32 |
| Propagation Delay | — | 2.49 ns |
| Maximum Internal Clock Frequency | — | 281 MHz |
| Maximum Clock Frequency (fMAX) | — | 1694.91 MHz |
| Core Supply Voltage | — | 1.5 V |
| Architecture | — | PLA-type / LUT-based |
| Package Type | — | FCBGA-724 (square) |
| Number of Pins / Balls | — | 724 |
| Terminal Pitch | — | 1.270 mm |
| Maximum User I/O | — | 536 |