EP2A70B724I9 vs EP2A70B724C9 Vergleich
Detaillierter Direktvergleich von EP2A70B724I9 von Altera und EP2A70B724C9 von Altera. Vergleichen Sie die wichtigsten Spezifikationen, elektrischen Parameter, Gehäuse, Lebenszyklusstatus, Preise und Verfügbarkeit, um das beste Bauteil für Ihre Designanforderungen zu ermitteln.
Spezifikationsvergleich
| Parameter | EP2A70B724I9 | EP2A70B724C9 |
|---|---|---|
| Marke | Altera | Altera |
| Kategorie | FPGA & CPLD | FPGA & CPLD |
| Lebenszyklusstatus | Obsolete | Obsolete |
| Lagerstatus | In Stock | In Stock |
| Stückpreis (USD) | $160,00 | $998,27 |
| Family | APEX II | APEX II |
| Logic Elements | 67,200 | 67200 |
| System Gates | Approximately 3,000,000 | — |
| Embedded Memory | 540 Kbits (1,146,880 bits total ESB memory per Jotrin listing) | — |
| Process Technology | 0.15 µm CMOS | 0.15 um all-layer copper (up to 8 metal layers) |
| Core Voltage | 1.5 V | — |
| Maximum Operating Frequency | 198 MHz | — |
| Number of PLLs | 4 | — |
| Embedded System Blocks (ESBs) | 4 | — |
| Gehäuse | 724-pin FCBGA (Flip-Chip BGA) | 724-BBGA, FCBGA (FineLine BGA) |
| Operating Temperature Grade | Industrial (-40C to +100C) | — |
| Montageart | Surface Mount | Surface Mount (BGA) |
| I/O Standards Supported | LVTTL, LVCMOS, SSTL, HSTL, LVDS | True-LVDS, LVPECL, PCML, HyperTransport |
| Configuration Mode | SRAM-based, configurable via JTAG or EPC enhanced configuration devices | — |
| RoHS-Status | [DATA_NEEDED: RoHS compliance status] | Non-compliant (per IC-Components listing) |
| Embedded Memory (bits) | — | 1146880 |
| User I/O Count | — | 540 |
| LVDS Channels | — | Up to 8 LVDS pairs at 1 Gbps |
| Embedded Memory Type | — | ESB (synchronous, self-timed WE, true dual-port / simple dual-port / single-port) |
| PLLs | — | Up to 4 |
| Speed Grade | — | C9 (commercial, speed bin 9) |
| Betriebstemperatur | — | 0C to +85C (commercial) |
| Supply Voltage (core) | — | 1.5 V |
| MSL-Level | — | [DATA_NEEDED: MSL level] |